sun4v/ml/mach_locore.s

5  * Common Development and Distribution License (the "License").
11  * and limitations under the License.
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
69  * On the sun4u we put the panic buffer in the third and fourth pages.
91  * moved out of kernel nucleus and allocated after panicbuf.
117  * cpu0 and its ptl1_panic stack.  The cpu structure must be allocated
212  * Our contract with the boot prom specifies that the MMU is on and the
214  * with p1275cis ptr in %o0 and kdi_dvec in %o1; we start execution
257 	! Write 0x1f (MAX_REG_WINDOWS) to %cwp and read back to get
311 	and	%g2, 0x3f, %g3
346 #error "hole in struct machpcb between frame and regs?"
375  * for this purpose, as user_rtt and priv_rtt do not depend on them.
429 	and	%g5, TSTATE_CWP, %g6
488 	! and %g6 is the label we want done to bounce to
738 	! disable interrupts and check for ASTs and wbuf restores
774 	! restore user globals and outs
830 	! switch "other" windows back to "normal" windows and
970 	! must reset ! the PC and nPC back to the beginning to prevent missed
987 	! the PC and nPC back to the beginning to prevent missed wakeups.
1002 	! restore globals and outs
1204 	! and increment cansave so that we don't overflow on these windows.
1245  * These need to be defined somewhere to lint and there is no "hicore.s"...
1292  * and the trap level is greater than 0.  ptl1_panic is responsible to save the
1293  * current CPU state, to restore the CPU state to normal, and to call panic.
1300  * ptl1_state structure is needed and (2) it simplifies physical address
1306  * cpu structure and a ptl1 panic stack.  They are put together on the same page
1308  * structure, and the high address part is for a ptl1 panic stack.
1365 	! restore %g3, %o1, %o2 and %o3
1422 	! Save register window state and register windows.
1619 	! %g2 and %g3 are used as scratch registers in ptl1_panic.