sun4v/io/cnex.c

114 static int cnex_intr_new_cpu(cnex_soft_state_t *ssp, cnex_intr_t *iinfo);
115 static int cnex_intr_dis_wait(cnex_soft_state_t *ssp, cnex_intr_t *iinfo);
361 cnex_intr_new_cpu(cnex_soft_state_t *ssp, cnex_intr_t *iinfo)
367 	rv = hvldc_intr_getvalid(ssp->cfghdl, iinfo->ino, &intr_state);
370 		    iinfo->ino);
376 		rv = cnex_intr_dis_wait(ssp, iinfo);
383 	iinfo->cpuid = intr_dist_cpuid();
384 	(void) hvldc_intr_settarget(ssp->cfghdl, iinfo->ino, iinfo->cpuid);
385 	intr_dist_cpuid_add_device_weight(iinfo->cpuid, iinfo->dip,
386 	    iinfo->weight);
390 		(void) hvldc_intr_setvalid(ssp->cfghdl, iinfo->ino,
402 cnex_intr_dis_wait(cnex_soft_state_t *ssp, cnex_intr_t *iinfo)
407 	rv = hvldc_intr_setvalid(ssp->cfghdl, iinfo->ino, HV_INTR_NOTVALID);
410 		    iinfo->ino);
421 		rv = hvldc_intr_getstate(ssp->cfghdl, iinfo->ino, &intr_state);
424 			    "state\n", iinfo->ino);
613 	cnex_intr_t	*iinfo;
641 		iinfo = &(cldcp->tx);
643 		iinfo = &(cldcp->rx);
651 	if (iinfo->hdlr != 0) {
658 	iinfo->hdlr = hdlr;
659 	iinfo->arg1 = arg1;
660 	iinfo->arg2 = arg2;
663 	iinfo->dip = cldcp->dip;
664 	iinfo->id = cldcp->id;
666 	iinfo->icookie = MINVINTR_COOKIE + iinfo->ino;
673 	if (iinfo->icookie >= MAXIVNUM || iinfo->icookie < MINVINTR_COOKIE) {
675 		    iinfo->icookie, iinfo->ino);
681 	    "cookie=0x%llx\n", cnex_ssp->cfghdl, iinfo->ino, iinfo->icookie);
692 	if (add_ivintr(iinfo->icookie, pil, (intrfunc)cnex_intr_wrapper,
693 	    (caddr_t)iinfo, NULL, NULL) != 0) {
695 		    iinfo->icookie, iinfo->ino);
701 	rv = hvldc_intr_setcookie(cnex_ssp->cfghdl, iinfo->ino, iinfo->icookie);
704 	iinfo->cpuid = intr_dist_cpuid();
707 	rv = hvldc_intr_settarget(cnex_ssp->cfghdl, iinfo->ino, iinfo->cpuid);
710 		    iinfo->ino);
713 	rv = hvldc_intr_setstate(cnex_ssp->cfghdl, iinfo->ino,
717 		    iinfo->ino);
720 	rv = hvldc_intr_setvalid(cnex_ssp->cfghdl, iinfo->ino, HV_INTR_VALID);
723 		    iinfo->ino);
727 	intr_dist_cpuid_add_device_weight(iinfo->cpuid, iinfo->dip,
728 	    iinfo->weight);
734 	(void) rem_ivintr(iinfo->icookie, pil);
802 	cnex_intr_t		*iinfo;
830 		iinfo = &(cldcp->tx);
832 		iinfo = &(cldcp->rx);
839 	D1("cnex_rem_intr: interrupt ino=0x%x\n", iinfo->ino);
842 	if (iinfo->hdlr == 0) {
848 	D1("cnex_rem_intr: set intr to invalid ino=0x%x\n", iinfo->ino);
850 	    iinfo->ino, HV_INTR_NOTVALID);
852 		DWARN("cnex_rem_intr: cannot set valid ino=%x\n", iinfo->ino);
861 	rv = hvldc_intr_getstate(cnex_ssp->cfghdl, iinfo->ino, &istate);
864 		    iinfo->ino);
872 		    iinfo->ino);
885 	intr_dist_cpuid_rem_device_weight(iinfo->cpuid, iinfo->dip);
888 	(void) rem_ivintr(iinfo->icookie, pil);
891 	bzero(iinfo, sizeof (*iinfo));
907 	cnex_intr_t		*iinfo;
934 		iinfo = &(cldcp->tx);
936 		iinfo = &(cldcp->rx);
943 	D1("%s: interrupt ino=0x%x\n", __func__, iinfo->ino);
946 	if (iinfo->hdlr == 0) {
952 	rv = hvldc_intr_setstate(cnex_ssp->cfghdl, iinfo->ino,
975 	cnex_intr_t 		*iinfo = (cnex_intr_t *)arg;
977 	ASSERT(iinfo != NULL);
979 	handler = iinfo->hdlr;
980 	handler_arg1 = iinfo->arg1;
981 	handler_arg2 = iinfo->arg2;
992 	DTRACE_PROBE4(channelintr__start, uint64_t, iinfo->id,
993 	    cnex_intr_t *, iinfo, void *, handler, caddr_t, handler_arg1);
995 	DTRACE_PROBE4(interrupt__start, dev_info_t, iinfo->dip,
998 	D1("cnex_intr_wrapper:ino=0x%llx invoke client handler\n", iinfo->ino);
1001 	DTRACE_PROBE4(interrupt__complete, dev_info_t, iinfo->dip,
1004 	DTRACE_PROBE4(channelintr__complete, uint64_t, iinfo->id,
1005 	    cnex_intr_t *, iinfo, void *, handler, caddr_t, handler_arg1);