Lines Matching refs:ASI_BLK_INIT_QUAD_LDD_AIUS
317 #define ASI_STBI_AIUS ASI_BLK_INIT_QUAD_LDD_AIUS
4807 mov ASI_BLK_INIT_QUAD_LDD_AIUS, %asi
7003 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l2
7007 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l4
7015 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l2
7021 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l4
7027 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l2
7048 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l2 ! partial data in %l2
7054 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l4 ! %l4 has partial data
7065 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l2
7075 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l4
7082 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l2
7105 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l2 ! partial data in %l3
7111 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l4 ! %l4 has complete data
7121 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l2
7132 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l4
7139 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l2
7161 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l0
7163 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l2
7170 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l4
7172 ldda [%i1]ASI_BLK_INIT_QUAD_LDD_AIUS, %l6
7606 * store using ASI_BLK_INIT_QUAD_LDD_AIUS (uzero)
7759 wr %g0, ASI_BLK_INIT_QUAD_LDD_AIUS, %asi