Lines Matching refs:iommu_p
1079 pci_iommu_get_dvma_context(iommu_t *iommu_p, dvma_addr_t dvma_pg_index)
1087 pci_iommu_free_dvma_context(iommu_t *iommu_p, dvma_context_t ctx)
1093 pci_iommu_config(iommu_t *iommu_p, uint64_t iommu_ctl, uint64_t cfgpa)
1096 get_pbm_reg_base(iommu_p->iommu_pci_p);
1099 volatile uint64_t *iommu_ctl_p = iommu_p->iommu_ctrl_reg;
1100 volatile uint64_t tsb_bar_val = iommu_p->iommu_tsb_paddr;
1101 volatile uint64_t *tsb_bar_p = iommu_p->iommu_tsb_base_addr_reg;
1103 DEBUG2(DBG_ATTACH, iommu_p->iommu_pci_p->pci_dip,
1106 DEBUG2(DBG_ATTACH|DBG_CONT, iommu_p->iommu_pci_p->pci_dip,
1109 DEBUG2(DBG_ATTACH|DBG_CONT, iommu_p->iommu_pci_p->pci_dip,
1191 pci_iommu_setup(iommu_t *iommu_p)
1196 pci_t *pci_p = iommu_p->iommu_pci_p;
1211 iommu_p->iommu_dvma_end = dvma_prop->dvma_base +
1218 iommu_p->iommu_tsb_size = iommu_tsb_size_encode(tsb_size);
1226 iommu_p->iommu_ctx_bitmap = NULL;
1227 iommu_p->iommu_flush_ctx_reg = NULL;
1240 pci_iommu_teardown(iommu_t *iommu_p)
1975 pci_vmem_free(iommu_t *iommu_p, ddi_dma_impl_t *mp, void *dvma_addr,
1978 pci_vmem_do_free(iommu_p, dvma_addr, npages,