sun4u/cpu/spitfire_asm.s

451 	 * %o1 = sfmmup
470         cmp     %o3, %o1
485 	 * %o1 = sfmmup
488 	SFMMU_CPU_CNUM(%o1, %g1, %g2)	/* %g1 = sfmmu cnum on this CPU */
649 	 * %o0 = pfnum, %o1 = color
651 	DCACHE_FLUSHPAGE(%o0, %o1, %o2, %o3, %o4)
670 	DCACHE_FLUSHCOLOR(%o0, %o1, %o2)
709  *	%o1, %o2 - arguments (2 uint64_t's)
741 	stxa	%o1, [%g2]ASI_INTR_DISPATCH
773  *	%o1 bytes to be flushed
781 	subcc	%o1, ICACHE_FLUSHSZ, %o1		! bytes = bytes-0x20
796  *	%o1 - size of address range to read
804 	ldxa	[%o0 + %o1]ASI_MEM, %g0	! start reading from physaddr + size
806 	subcc	%o1, %o2, %o1
836 	sub	%o1, %o2, %g3		! start from last entry
860 	DCACHE_FLUSHALL(%o0, %o1, %g1)
1103 	mov	%o1, %o2		! lower 32 bits of AFAR
1104 	mov	%o0, %o1		! upper 32 bits of AFAR
1194 	andcc	%o5, %o2, %o1			! check for UE,CE in upper half
1197 	stxa	%o1, [%o4]ASI_SDB_INTR_W	! clear sdb reg UE,CE error bits
1202 	andcc	%o5, %o2, %o1			! check for UE,CE in lower half
1205 	stxa	%o1, [%o4]ASI_SDB_INTR_W	! clear sdb reg UE,CE error bits
1219 	  stx	%o2, [%o1]
1262 	stx	%g1, [%o1]
1282 	stx	%g1, [%o1]
1358 	 * %o1: In: 64-bit AFSR value after clearing sticky bits
1392 	  stx	%o3, [%o1]			! AFSR after sticky clear
1410 	 * %o1: In: address of cpu private afsr storage
1430 	ldx	[%o1], %o3
1432 	stx	%o3, [%o1]
1450 	ldx	[%o1], %o3
1452 	stx	%o3, [%o1]
1510 	or	%o1, %g0, %o2	! put ecache size in %o2
1512 	xor	%o0, %o2, %o1	! calculate alias address
1516 	and	%o1, %o3, %o1	! and with xor'd address
1524 	ldxa	[%o1 + %o3]ASI_MEM, %g0 ! load ecache_flushaddr + alias
1526 	ldxa	[%o1 + %o3]ASI_MEM, %g0	! load ecache_flushaddr + alias
1556 	xor	%o0, %o2, %o1	! calculate alias address
1560 	and	%o1, %g3, %o1	! and with xor'd address
1583 	or	%o1, %g0, %g5		! starting aliased offset
1598 	! Need single displacement flush at offset %o1 this time as
1600 	ldxa	[%o1 + %o3]ASI_MEM, %g0	! load ecache_flushaddr + alias
1634 	or	%o1, %g0, %o2	! ecache size
1637 	xor	%o0, %o2, %o1	! calculate alias address
1640 	and	%o1, %o3, %o1	! and with xor'd address
1661 	ldxa	[%o1 + %o3]ASI_MEM, %g0	! load ecache_flushaddr + alias
1663 	ldxa	[%o1 + %o3]ASI_MEM, %g0	! load ecache_flushaddr + alias
1698 	xor	%o0, %o2, %o1	! calculate alias address
1701 	and	%o1, %g3, %o1	! and with xor'd address
1734 	or	%o1, %g0, %g5		! starting offset
1749 	! Need single displacement flush at offset %o1 this time as
1751 	ldxa	[%o1 + %o3]ASI_MEM, %g0	! load ecache_flushaddr + alias
1782         or      %o1, %g0, %o2   ! put ecache size in %o2
1784         xor     %o0, %o2, %o1   ! calculate alias address
1788         and     %o1, %o3, %o1   ! and with xor'd address
1800         ldxa    [%o1 + %o3]ASI_MEM, %g0 ! load ecache_flushaddr + alias
1832 	xor	%o0, %o2, %o1	! calculate alias address
1836 	and	%o1, %g3, %o1	! and with xor'd address
1864 	ldxa	[%o1 + %o3]ASI_MEM, %g0	! load ecache_flushaddr + alias
1866 	add	%o1, %g2, %o1		! calculate offset in next set
1867 	and	%o1, %g3, %o1		! force offset within aliased range
1868 	cmp	%o1, %o5		! skip loads from physaddr
1943          * Input %o1= 32 bit E$ index
1951         andn    %o5, PSTATE_IE | PSTATE_AM, %o1
1952         wrpr    %o1, %g0, %pstate               ! clear IE, AM bits
1991          * Input %o1= 32 bit E$ index
1999         andn    %o5, PSTATE_IE | PSTATE_AM, %o1
2000         wrpr    %o1, %g0, %pstate               ! clear IE, AM bits