io/pci/pci_boot.c

88 	uint8_t			dev;
97 	uchar_t dev;
132 static int get_pci_cap(uchar_t bus, uchar_t dev, uchar_t func, uint8_t cap_id);
135 static void create_ioapic_node(int bus, int dev, int fn, ushort_t vendorid,
827 get_pci_cap(uchar_t bus, uchar_t dev, uchar_t func, uint8_t cap_id)
838 	status = pci_getw(bus, dev, func, PCI_CONF_STAT);
842 	cap_id_loc = pci_getb(bus, dev, func, PCI_CONF_CAP_PTR);
846 		curcap = pci_getb(bus, dev, func, cap_id_loc);
852 		cap_id_loc = pci_getb(bus, dev, func, cap_id_loc + 1);
903 	uchar_t bus, dev, func;
936 	dev = (uchar_t)PCI_REG_DEV_G(physhi);
942 	cap_ptr = get_pci_cap(bus, dev, func, PCI_CAP_ID_PCI_E);
944 		cmd_reg = pci_getw(bus, dev, func,
949 			    bus, dev, func);
954 	subbus = pci_getb(bus, dev, func, PCI_BCNF_SUBBUS);
957 	cmd_reg = pci_getw(bus, dev, func, PCI_CONF_COMM);
984 			pci_putb(bus, dev, func, PCI_BCNF_SUBBUS, subbus);
988 			    "[%x/%x/%x]: %x ~ %x\n", bus, dev, func,
1062 				    bus, dev, func, (uint32_t)addr,
1079 				    bus, dev, func, (uint32_t)addr,
1092 	io_base = pci_getb(bus, dev, func, PCI_BCNF_IO_BASE_LOW);
1093 	io_limit = pci_getb(bus, dev, func, PCI_BCNF_IO_LIMIT_LOW);
1157 			pci_putb(bus, dev, func, PCI_BCNF_IO_BASE_LOW,
1159 			pci_putb(bus, dev, func, PCI_BCNF_IO_LIMIT_LOW,
1161 			pci_putb(bus, dev, func, PCI_BCNF_IO_BASE_HI, 0);
1162 			pci_putb(bus, dev, func, PCI_BCNF_IO_LIMIT_HI, 0);
1167 			    bus, dev, func, io_base, io_limit);
1175 	mem_base = (uint_t)pci_getw(bus, dev, func, PCI_BCNF_MEM_BASE);
1177 	mem_limit = (uint_t)pci_getw(bus, dev, func, PCI_BCNF_MEM_LIMIT);
1239 			pci_putw(bus, dev, func, PCI_BCNF_MEM_BASE,
1241 			pci_putw(bus, dev, func, PCI_BCNF_MEM_LIMIT,
1256 				pci_putw(bus, dev, func, PCI_BCNF_PF_BASE_LOW,
1258 				pci_putw(bus, dev, func, PCI_BCNF_PF_LIMIT_LOW,
1260 				pci_putl(bus, dev, func, PCI_BCNF_PF_BASE_HIGH,
1262 				pci_putl(bus, dev, func, PCI_BCNF_PF_LIMIT_HIGH,
1270 			    bus, dev, func, mem_base, mem_limit);
1280 	pci_putw(bus, dev, func, PCI_CONF_COMM, cmd_reg);
1419 	/* All dev programmed, so we can create available prop */
1518 	uchar_t dev, func, nfunc, header;
1539 				    entry->dev, entry->func, CONFIG_NEW, 0);
1547 	for (dev = 0; dev < max_dev_pci; dev++) {
1551 			dcmn_err(CE_NOTE, "probing dev 0x%x, func 0x%x",
1552 			    dev, func);
1554 			venid = pci_getw(bus, dev, func, PCI_CONF_VENID);
1561 			header = pci_getb(bus, dev, func, PCI_CONF_HEADER);
1584 				process_devfunc(bus, dev, func, header,
1726 add_undofix_entry(uint8_t bus, uint8_t dev, uint8_t fn,
1738 	newundo->dev = dev;
1769 	uint8_t bus, dev, fn;
1778 		dev = undolist->dev;
1781 		(*(undolist->undofn))(bus, dev, fn);
1790 undo_amd8111_pci_fix(uint8_t bus, uint8_t dev, uint8_t fn)
1794 	val8 = pci_getb(bus, dev, fn, LPC_IO_CONTROL_REG_1);
1800 	pci_putb(bus, dev, fn, LPC_IO_CONTROL_REG_1, val8);
1804 pci_fix_amd8111(uint8_t bus, uint8_t dev, uint8_t fn)
1808 	val8 = pci_getb(bus, dev, fn, LPC_IO_CONTROL_REG_1);
1820 	pci_putb(bus, dev, fn, LPC_IO_CONTROL_REG_1, val8);
1822 	add_undofix_entry(bus, dev, fn, undo_amd8111_pci_fix);
1826 set_devpm_d0(uchar_t bus, uchar_t dev, uchar_t func)
1834 	status = pci_getw(bus, dev, func, PCI_CONF_STAT);
1838 	header = pci_getb(bus, dev, func, PCI_CONF_HEADER) & PCI_HEADER_TYPE_M;
1840 		cap_ptr = pci_getb(bus, dev, func, PCI_CBUS_CAP_PTR);
1842 		cap_ptr = pci_getb(bus, dev, func, PCI_CONF_CAP_PTR);
1848 		cap_id = pci_getb(bus, dev, func, cap_ptr + PCI_CAP_ID);
1850 			pmcsr = pci_getw(bus, dev, func, cap_ptr + PCI_PMCSR);
1853 			pci_putw(bus, dev, func, cap_ptr + PCI_PMCSR, pmcsr);
1856 		cap_ptr = pci_getb(bus, dev, func, cap_ptr + PCI_CAP_NEXT_PTR);
1865 process_devfunc(uchar_t bus, uchar_t dev, uchar_t func, uchar_t header,
1883 	ushort_t deviceid = pci_getw(bus, dev, func, PCI_CONF_DEVID);
1887 		subvenid = pci_getw(bus, dev, func, PCI_CONF_SUBVENID);
1888 		subdevid = pci_getw(bus, dev, func, PCI_CONF_SUBSYSID);
1891 		subvenid = pci_getw(bus, dev, func, PCI_CBUS_SUBVENID);
1892 		subdevid = pci_getw(bus, dev, func, PCI_CBUS_SUBSYSID);
1905 			pci_fix_amd8111(bus, dev, func);
1911 	revclass = pci_getl(bus, dev, func, PCI_CONF_REVID);
1939 	if (check_if_device_is_pciex(dip, bus, dev, func, &slot_valid,
1943 	bdf = PCI_GETBDF(bus, dev, func);
1954 			secbus = pci_getb(bus, dev, func, PCI_BCNF_SECBUS);
1955 			subbus = pci_getb(bus, dev, func, PCI_BCNF_SUBBUS);
1979 		(void) snprintf(unitaddr, sizeof (unitaddr), "%x", dev);
1982 		    "%x,%x", dev, func);
1993 		uchar_t mingrant = pci_getb(bus, dev, func, PCI_CONF_MIN_G);
1994 		uchar_t maxlatency = pci_getb(bus, dev, func, PCI_CONF_MAX_L);
2011 	intr = pci_getb(bus, dev, func, PCI_CONF_IPIN);
2019 	status = pci_getw(bus, dev, func, PCI_CONF_STAT);
2043 	set_devpm_d0(bus, dev, func);
2046 		add_ppb_props(dip, bus, dev, func, pciex, is_pci_bridge);
2056 		entry->dev = dev;
2063 		create_ioapic_node(bus, dev, func, vendorid, deviceid);
2067 	if (NVIDIA_IS_LPC_BRIDGE(vendorid, deviceid) && (dev == 1) &&
2069 		add_nvidia_isa_bridge_props(dip, bus, dev, func);
2106 	reprogram = add_reg_props(dip, bus, dev, func, config_op, pciide);
2360 add_reg_props(dev_info_t *dip, uchar_t bus, uchar_t dev, uchar_t func,
2386 	devloc = (uint_t)bus << 16 | (uint_t)dev << 11 | (uint_t)func << 8;
2391 	baseclass = pci_getb(bus, dev, func, PCI_CONF_BASCLASS);
2392 	subclass = pci_getb(bus, dev, func, PCI_CONF_SUBCLASS);
2393 	progclass = pci_getb(bus, dev, func, PCI_CONF_PROGCLASS);
2394 	header = pci_getb(bus, dev, func, PCI_CONF_HEADER) & PCI_HEADER_TYPE_M;
2433 		base = pci_getl(bus, dev, func, offset);
2435 			command = (uint_t)pci_getw(bus, dev, func,
2437 			pci_putw(bus, dev, func, PCI_CONF_COMM,
2440 		pci_putl(bus, dev, func, offset, 0xffffffff);
2441 		value = pci_getl(bus, dev, func, offset);
2442 		pci_putl(bus, dev, func, offset, base);
2444 			pci_putw(bus, dev, func, PCI_CONF_COMM, command);
2517 					pci_putl(bus, dev, func, offset,
2519 					base = pci_getl(bus, dev, func, offset);
2526 					    bus, dev, func, offset, len);
2536 				base_hi = pci_getl(bus, dev, func, offset + 4);
2642 					pci_putl(bus, dev, func, offset,
2644 					base = pci_getl(bus, dev, func, offset);
2650 					    bus, dev, func, offset, len);
2672 	base = pci_getl(bus, dev, func, offset);
2673 	pci_putl(bus, dev, func, offset, PCI_BASE_ROM_ADDR_M);
2674 	value = pci_getl(bus, dev, func, offset);
2675 	pci_putl(bus, dev, func, offset, base);
2778 add_ppb_props(dev_info_t *dip, uchar_t bus, uchar_t dev, uchar_t func,
2784 	uchar_t secbus = pci_getb(bus, dev, func, PCI_BCNF_SECBUS);
2785 	uchar_t subbus = pci_getb(bus, dev, func, PCI_BCNF_SUBBUS);
2793 	progclass = pci_getb(bus, dev, func, PCI_CONF_PROGCLASS);
2863 	val = (uint_t)pci_getw(bus, dev, func, PCI_CONF_COMM);
2865 		val = (uint_t)pci_getb(bus, dev, func, PCI_BCNF_IO_BASE_LOW);
2867 		val = (uint_t)pci_getb(bus, dev, func, PCI_BCNF_IO_LIMIT_LOW);
2872 		pci_putb(bus, dev, func, PCI_BCNF_IO_BASE_LOW,
2874 		pci_putb(bus, dev, func, PCI_BCNF_IO_LIMIT_LOW,
2876 		pci_putw(bus, dev, func, PCI_BCNF_IO_BASE_HI, 0);
2877 		pci_putw(bus, dev, func, PCI_BCNF_IO_LIMIT_HI, 0);
2896 		    pci_getw(bus, dev, func, PCI_BCNF_IO_BASE_HI)) {
2898 			    " pci-pci bridge [%d/%d/%d]", bus, dev, func);
2903 	val = (uint_t)pci_getw(bus, dev, func, PCI_BCNF_MEM_BASE);
2905 	val = (uint_t)pci_getw(bus, dev, func, PCI_BCNF_MEM_LIMIT);
2926 	val = (uint_t)pci_getw(bus, dev, func, PCI_BCNF_PF_BASE_LOW);
2928 	val = (uint_t)pci_getw(bus, dev, func, PCI_BCNF_PF_LIMIT_LOW);
2948 		    pci_getl(bus, dev, func, PCI_BCNF_PF_BASE_HIGH)) {
2950 			    " pci-pci bridge [%d/%d/%d]", bus, dev, func);
2963 	if (pci_getw(bus, dev, func, PCI_BCNF_BCNTRL) &
3273 create_ioapic_node(int bus, int dev, int fn, ushort_t vendorid,
3283 	lobase = (*pci_getl_func)(bus, dev, fn, PCI_CONF_BASE0);
3290 		hibase = (*pci_getl_func)(bus, dev, fn, PCI_CONF_BASE0 + 4);
3345 	/* set mask to 1 as there is only one slot (i.e dev 0) */