io/drm/i915_irq.c

71 		(void) I915_READ(GTIMR);
75 		(void) I915_READ(DEIMR);
86 		(void) I915_READ(GTIMR);
90 		(void) I915_READ(DEIMR);
101                (void) I915_READ(DEIMR);
112                (void) I915_READ(DEIMR);
123                 (void) I915_READ(IMR);
133                 (void) I915_READ(IMR);
156 		(void) I915_READ(reg);
168 		(void) I915_READ(reg);
187 	if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
214 		high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
216 		low =  ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
218 		high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
252 	error->eir = I915_READ(EIR);
253 	error->pgtbl_er = I915_READ(PGTBL_ER);
254 	error->pipeastat = I915_READ(PIPEASTAT);
255 	error->pipebstat = I915_READ(PIPEBSTAT);
256 	error->instpm = I915_READ(INSTPM);
258 		error->ipeir = I915_READ(IPEIR);
259 		error->ipehr = I915_READ(IPEHR);
260 		error->instdone = I915_READ(INSTDONE);
261 		error->acthd = I915_READ(ACTHD);
263 		error->ipeir = I915_READ(IPEIR_I965);
264 		error->ipehr = I915_READ(IPEHR_I965);
265 		error->instdone = I915_READ(INSTDONE_I965);
266 		error->instps = I915_READ(INSTPS);
267 		error->instdone1 = I915_READ(INSTDONE1);
268 		error->acthd = I915_READ(ACTHD_I965);
284 	DRM_DEBUG("  DMA_FADD_P: 0x%08x\n", I915_READ(0x2078));
307 	u32 eir = I915_READ(EIR);
308 	u32 pipea_stats = I915_READ(PIPEASTAT);
309 	u32 pipeb_stats = I915_READ(PIPEBSTAT);
318 			u32 ipeir = I915_READ(IPEIR_I965);
321 			       I915_READ(IPEIR_I965));
323 			       I915_READ(IPEHR_I965));
325 			       I915_READ(INSTDONE_I965));
327 			       I915_READ(INSTPS));
329 			       I915_READ(INSTDONE1));
331 			       I915_READ(ACTHD_I965));
333 			(void)I915_READ(IPEIR_I965);
336 			u32 pgtbl_err = I915_READ(PGTBL_ER);
341 			(void)I915_READ(PGTBL_ER);
347 			u32 pgtbl_err = I915_READ(PGTBL_ER);
352 			(void)I915_READ(PGTBL_ER);
367 		       I915_READ(INSTPM));
369 			u32 ipeir = I915_READ(IPEIR);
372 			       I915_READ(IPEIR));
374 			       I915_READ(IPEHR));
376 			       I915_READ(INSTDONE));
378 			       I915_READ(ACTHD));
380 			(void)I915_READ(IPEIR);
382 			u32 ipeir = I915_READ(IPEIR_I965);
385 			       I915_READ(IPEIR_I965));
387 			       I915_READ(IPEHR_I965));
389 			       I915_READ(INSTDONE_I965));
391 			       I915_READ(INSTPS));
393 			       I915_READ(INSTDONE1));
395 			       I915_READ(ACTHD_I965));
397 			(void)I915_READ(IPEIR_I965);
402 	(void)I915_READ(EIR);
403 	eir = I915_READ(EIR);
410 		I915_WRITE(EMR, I915_READ(EMR) | eir);
426        return I915_READ(reg);
438 	de_ier = I915_READ(DEIER);
440 	(void)I915_READ(DEIER);
442        de_iir = I915_READ(DEIIR);
443        gt_iir = I915_READ(GTIIR);
452                new_de_iir = I915_READ(DEIIR);
454                new_gt_iir = I915_READ(GTIIR);
480 	(void)I915_READ(DEIER);
496 	iir = I915_READ(IIR);
510 	(void) I915_READ(IIR); /* Flush posted writes */
522                 pipea_stats = I915_READ(PIPEASTAT);
539                 pipeb_stats = I915_READ(PIPEBSTAT);
769 		(void) I915_READ(DEIER);
787 		(void) I915_READ(DEIER);
797 	pipeconf = I915_READ(pipeconf_reg);
901        (void) I915_READ(DEIER);
906        (void) I915_READ(GTIER);
920        I915_WRITE(DEIIR, I915_READ(DEIIR));
921        (void) I915_READ(DEIIR);
924        (void) I915_READ(DEIER);
930        I915_WRITE(GTIIR, I915_READ(GTIIR));
931        (void) I915_READ(GTIIR);
934        (void) I915_READ(GTIER);
946        I915_WRITE(DEIIR, I915_READ(DEIIR));
950        I915_WRITE(GTIIR, I915_READ(GTIIR));
970 	(void) I915_READ(IER);
1010 	I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) & 0x8000ffff);
1011 	I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) & 0x8000ffff);
1012 	(void) I915_READ(PIPEASTAT);
1013         (void) I915_READ(PIPEBSTAT);
1015 	I915_WRITE(IIR, I915_READ(IIR));
1017 	(void) I915_READ(IIR);
1020 	(void) I915_READ(IER);
1047 	I915_WRITE(PIPEASTAT, I915_READ(PIPEASTAT) & 0x8000ffff);
1048 	I915_WRITE(PIPEBSTAT, I915_READ(PIPEBSTAT) & 0x8000ffff);
1049 	I915_WRITE(IIR, I915_READ(IIR));