io/drm/i915_drv.c

246 		return (S3_READ(DPLL_A) & DPLL_VCO_ENABLE);
248 		return (S3_READ(DPLL_B) & DPLL_VCO_ENABLE);
268 		array[i] = S3_READ(reg + (i << 2));
446 	s3_priv->saveDSPARB = S3_READ(DSPARB);
451 	s3_priv->savePIPEACONF = S3_READ(PIPEACONF);
452 	s3_priv->savePIPEASRC = S3_READ(PIPEASRC);
453 	s3_priv->saveFPA0 = S3_READ(FPA0);
454 	s3_priv->saveFPA1 = S3_READ(FPA1);
455 	s3_priv->saveDPLL_A = S3_READ(DPLL_A);
457 		s3_priv->saveDPLL_A_MD = S3_READ(DPLL_A_MD);
458 	s3_priv->saveHTOTAL_A = S3_READ(HTOTAL_A);
459 	s3_priv->saveHBLANK_A = S3_READ(HBLANK_A);
460 	s3_priv->saveHSYNC_A = S3_READ(HSYNC_A);
461 	s3_priv->saveVTOTAL_A = S3_READ(VTOTAL_A);
462 	s3_priv->saveVBLANK_A = S3_READ(VBLANK_A);
463 	s3_priv->saveVSYNC_A = S3_READ(VSYNC_A);
464 	s3_priv->saveBCLRPAT_A = S3_READ(BCLRPAT_A);
466 	s3_priv->saveDSPACNTR = S3_READ(DSPACNTR);
467 	s3_priv->saveDSPASTRIDE = S3_READ(DSPASTRIDE);
468 	s3_priv->saveDSPASIZE = S3_READ(DSPASIZE);
469 	s3_priv->saveDSPAPOS = S3_READ(DSPAPOS);
470 	s3_priv->saveDSPABASE = S3_READ(DSPABASE);
472 		s3_priv->saveDSPASURF = S3_READ(DSPASURF);
473 		s3_priv->saveDSPATILEOFF = S3_READ(DSPATILEOFF);
476 	s3_priv->savePIPEASTAT = S3_READ(PIPEASTAT);
481 	s3_priv->savePIPEBCONF = S3_READ(PIPEBCONF);
482 	s3_priv->savePIPEBSRC = S3_READ(PIPEBSRC);
483 	s3_priv->saveFPB0 = S3_READ(FPB0);
484 	s3_priv->saveFPB1 = S3_READ(FPB1);
485 	s3_priv->saveDPLL_B = S3_READ(DPLL_B);
487 		s3_priv->saveDPLL_B_MD = S3_READ(DPLL_B_MD);
488 	s3_priv->saveHTOTAL_B = S3_READ(HTOTAL_B);
489 	s3_priv->saveHBLANK_B = S3_READ(HBLANK_B);
490 	s3_priv->saveHSYNC_B = S3_READ(HSYNC_B);
491 	s3_priv->saveVTOTAL_B = S3_READ(VTOTAL_B);
492 	s3_priv->saveVBLANK_B = S3_READ(VBLANK_B);
493 	s3_priv->saveVSYNC_B = S3_READ(VSYNC_B);
494 	s3_priv->saveBCLRPAT_A = S3_READ(BCLRPAT_A);
496 	s3_priv->saveDSPBCNTR = S3_READ(DSPBCNTR);
497 	s3_priv->saveDSPBSTRIDE = S3_READ(DSPBSTRIDE);
498 	s3_priv->saveDSPBSIZE = S3_READ(DSPBSIZE);
499 	s3_priv->saveDSPBPOS = S3_READ(DSPBPOS);
500 	s3_priv->saveDSPBBASE = S3_READ(DSPBBASE);
502 		s3_priv->saveDSPBSURF = S3_READ(DSPBSURF);
503 		s3_priv->saveDSPBTILEOFF = S3_READ(DSPBTILEOFF);
506 	s3_priv->savePIPEBSTAT = S3_READ(PIPEBSTAT);
511 	s3_priv->saveADPA = S3_READ(ADPA);
516 	s3_priv->savePP_CONTROL = S3_READ(PP_CONTROL);
517 	s3_priv->savePFIT_PGM_RATIOS = S3_READ(PFIT_PGM_RATIOS);
518 	s3_priv->saveBLC_PWM_CTL = S3_READ(BLC_PWM_CTL);
520 		s3_priv->saveBLC_PWM_CTL2 = S3_READ(BLC_PWM_CTL2);
522 		s3_priv->saveLVDS = S3_READ(LVDS);
524 		s3_priv->savePFIT_CONTROL = S3_READ(PFIT_CONTROL);
525 	s3_priv->saveLVDSPP_ON = S3_READ(LVDSPP_ON);
526 	s3_priv->saveLVDSPP_OFF = S3_READ(LVDSPP_OFF);
527 	s3_priv->savePP_CYCLE = S3_READ(PP_CYCLE);
532 	s3_priv->saveFBC_CFB_BASE = S3_READ(FBC_CFB_BASE);
533 	s3_priv->saveFBC_LL_BASE = S3_READ(FBC_LL_BASE);
534 	s3_priv->saveFBC_CONTROL2 = S3_READ(FBC_CONTROL2);
535 	s3_priv->saveFBC_CONTROL = S3_READ(FBC_CONTROL);
538 	s3_priv->saveVCLK_DIVISOR_VGA0 = S3_READ(VCLK_DIVISOR_VGA0);
539 	s3_priv->saveVCLK_DIVISOR_VGA1 = S3_READ(VCLK_DIVISOR_VGA1);
540 	s3_priv->saveVCLK_POST_DIV = S3_READ(VCLK_POST_DIV);
541 	s3_priv->saveVGACNTRL = S3_READ(VGACNTRL);
593 	S3_WRITE(DSPABASE, S3_READ(DSPABASE));
633         S3_WRITE(DSPBBASE, S3_READ(DSPBBASE));
691 		(void) S3_READ(MCHBAR_RENDER_STANDBY);
695 		(void) S3_READ(HWS_PGA);
744 		s3_priv->saveRENDERSTANDBY = S3_READ(MCHBAR_RENDER_STANDBY);
747 	s3_priv->saveHWS = S3_READ(HWS_PGA);
752 	s3_priv->saveIIR = S3_READ(IIR);
753 	s3_priv->saveIER = S3_READ(IER);
754 	s3_priv->saveIMR = S3_READ(IMR);
757 	s3_priv->saveD_STATE = S3_READ(D_STATE);
758 	s3_priv->saveCG_2D_DIS = S3_READ(CG_2D_DIS);
761 	s3_priv->saveCACHE_MODE_0 = S3_READ(CACHE_MODE_0);
764 	s3_priv->saveMI_ARB_STATE = S3_READ(MI_ARB_STATE);
768 		s3_priv->saveSWF0[i] = S3_READ(SWF0 + (i << 2));
769 		s3_priv->saveSWF1[i] = S3_READ(SWF10 + (i << 2));
772 		s3_priv->saveSWF2[i] = S3_READ(SWF30 + (i << 2));
777 	s3_priv->pgtbl_ctl = S3_READ(I915REG_PGTBL_CTRL);