Lines Matching refs:iommu
34 amd_iommu_wait_for_completion(amd_iommu_t *iommu)
36 ASSERT(MUTEX_HELD(&iommu->aiomt_cmdlock));
38 iommu->aiomt_reg_status_va), AMD_IOMMU_COMWAIT_INT) != 1) {
39 AMD_IOMMU_REG_SET64(REGADDR64(iommu->aiomt_reg_ctrl_va),
46 create_compl_wait_cmd(amd_iommu_t *iommu, amd_iommu_cmdargs_t *cmdargsp,
49 const char *driver = ddi_driver_name(iommu->aiomt_dip);
50 int instance = ddi_get_instance(iommu->aiomt_dip);
58 f, driver, instance, iommu->aiomt_idx);
78 create_inval_devtab_entry_cmd(amd_iommu_t *iommu, amd_iommu_cmdargs_t *cmdargsp,
81 const char *driver = ddi_driver_name(iommu->aiomt_dip);
82 int instance = ddi_get_instance(iommu->aiomt_dip);
91 iommu->aiomt_idx);
108 create_inval_iommu_pages_cmd(amd_iommu_t *iommu, amd_iommu_cmdargs_t *cmdargsp,
139 create_inval_iotlb_pages_cmd(amd_iommu_t *iommu, amd_iommu_cmdargs_t *cmdargsp,
170 create_inval_intr_table_cmd(amd_iommu_t *iommu, amd_iommu_cmdargs_t *cmdargsp,
173 const char *driver = ddi_driver_name(iommu->aiomt_dip);
174 int instance = ddi_get_instance(iommu->aiomt_dip);
182 f, driver, instance, iommu->aiomt_idx);
196 amd_iommu_cmd(amd_iommu_t *iommu, amd_iommu_cmd_t cmd,
202 const char *driver = ddi_driver_name(iommu->aiomt_dip);
203 int instance = ddi_get_instance(iommu->aiomt_dip);
209 ASSERT(lock_held == 0 || MUTEX_HELD(&iommu->aiomt_cmdlock));
212 mutex_enter(&iommu->aiomt_cmdlock);
222 f, driver, instance, iommu->aiomt_idx);
226 error = create_compl_wait_cmd(iommu, cmdargs, flags, cmdptr);
229 error = create_inval_devtab_entry_cmd(iommu, cmdargs,
233 error = create_inval_iommu_pages_cmd(iommu, cmdargs,
237 error = create_inval_iotlb_pages_cmd(iommu, cmdargs,
241 error = create_inval_intr_table_cmd(iommu, cmdargs,
246 f, driver, instance, iommu->aiomt_idx, cmd);
256 AMD_IOMMU_REG_SET64(REGADDR64(iommu->aiomt_reg_ctrl_va),
259 ASSERT(iommu->aiomt_cmd_tail != NULL);
262 iommu->aiomt_cmd_tail[i] = cmdptr[i];
267 REGADDR64(iommu->aiomt_reg_cmdbuf_head_va),
272 ASSERT(cmdhead_off < iommu->aiomt_cmdbuf_sz);
275 if ((caddr_t)iommu->aiomt_cmd_tail <
276 (cmdhead_off + iommu->aiomt_cmdbuf)) {
277 if ((caddr_t)iommu->aiomt_cmd_tail + 16 >=
278 (cmdhead_off + iommu->aiomt_cmdbuf))
286 SYNC_FORDEV(iommu->aiomt_dmahdl);
292 iommu->aiomt_cmd_tail += 4;
293 if ((caddr_t)iommu->aiomt_cmd_tail >= (iommu->aiomt_cmdbuf
294 + iommu->aiomt_cmdbuf_sz)) {
297 iommu->aiomt_cmd_tail = (uint32_t *)iommu->aiomt_cmdbuf;
300 cmdtail_off = (caddr_t)iommu->aiomt_cmd_tail
302 - iommu->aiomt_cmdbuf;
305 ASSERT(cmdtail_off < iommu->aiomt_cmdbuf_sz);
307 AMD_IOMMU_REG_SET64(REGADDR64(iommu->aiomt_reg_cmdbuf_tail_va),
311 amd_iommu_wait_for_completion(iommu);
313 error = amd_iommu_cmd(iommu, AMD_IOMMU_CMD_COMPL_WAIT,
319 mutex_exit(&iommu->aiomt_cmdlock);