Lines Matching defs:bits
55 * The first nibble (bits 0 through 3) is changed with every revision
56 * of the silicon. So these bits are masked out to support future revisions
57 * of the same chip. The third nibble (bits 8 through 11) is changed for
58 * different chips of the same family. So these bits are masked out to
73 * (bits[9:0]) use 0xa19400 for any model or revision of the TN1010
79 * 1.2 and register 1.3 except bits[9:4] of register 1.3 for model number
80 * and bits[3:0] of register 1.3 for revision numbers. Use mask 0xfffffc00
88 * 1.2 and register 1.3 except bits[7:4] of register 1.3 have the model number
89 * and bits[3:0] of register 1.3 have the revision number. Use mask 0xffffff00
234 } bits;
278 } bits;
288 } bits;
304 } bits;
320 } bits;
330 } bits;
347 } bits;
391 } bits;
437 } bits;
481 } bits;
499 } bits;
526 } bits;
547 } bits;
604 /* Rx Channel Control1 Register bits */
631 } bits;
663 } bits;
688 } bits;
726 } bits;
776 uint16_t speed_sel0 : 4; /* bits[5:2] */
780 uint16_t speed_sel0 : 4; /* bits[5:2] */
789 } bits;
804 uint16_t speed_sel0 : 4; /* bits[5:2] */
808 uint16_t speed_sel0 : 4; /* bits[5:2] */
817 } bits;
894 * Shift right 6 bits so bits[7:6] becomes [1:0].
906 /* Shift right 4 bits so bit4 becomes bit0 */