Lines Matching defs:bar0
167 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
171 (void) __hal_device_register_poll(hldev, &bar0->adapter_status, 1,
182 (void) __hal_device_register_poll(hldev, &bar0->adapter_status, 1,
211 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
215 &bar0->adapter_status);
224 &bar0->pcc_enable);
242 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
269 &bar0->beacon_control);
272 val64, &bar0->beacon_control);
275 (void *) ((u8 *)bar0 + 0x2700));
310 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
332 xena_fix_mac[i++], &bar0->beacon_control);
349 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
353 &bar0->mac_cfg);
357 XGE_HAL_RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
360 (u32)(val64 >> 32), &bar0->mac_cfg);
379 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
383 &bar0->mac_cfg);
387 XGE_HAL_RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
390 (u32)(val64 >> 32), &bar0->mac_cfg);
407 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
411 &bar0->pic_control);
415 &bar0->pic_control);
429 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
433 XGE_HAL_RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
435 &bar0->mac_cfg);
445 &bar0->rts_rth_cfg) & XGE_HAL_RTS_RTH_EN)) {
453 (u32)(val64 >> 32), (char*)&bar0->mac_cfg);
474 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
495 val64, &bar0->mc_pause_thresh_q0q3);
497 val64, &bar0->mc_pause_thresh_q4q7);
502 &bar0->rmac_pause_cfg);
514 &bar0->rmac_pause_cfg);
523 &bar0->mc_pause_thresh_q0q3);
532 &bar0->mc_pause_thresh_q4q7);
610 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
615 hldev->regh0, &bar0->general_int_mask);
625 hldev->regh0, &bar0->pic_int_mask);
635 temp64, &bar0->pic_int_mask);
643 hldev->regh0, &bar0->misc_int_mask);
647 &bar0->misc_int_mask);
662 hldev->regh0, &bar0->misc_int_mask);
667 &bar0->misc_int_mask);
677 &bar0->pic_int_mask);
691 0x0, &bar0->txdma_int_mask);
693 0x0, &bar0->pfc_err_mask);
695 0x0, &bar0->tda_err_mask);
697 0x0, &bar0->pcc_err_mask);
699 0x0, &bar0->tti_err_mask);
701 0x0, &bar0->lso_err_mask);
703 0x0, &bar0->tpa_err_mask);
705 0x0, &bar0->sm_err_mask);
713 &bar0->txdma_int_mask);
716 &bar0->pfc_err_mask);
733 &bar0->rxdma_int_mask);
741 &bar0->rxdma_int_mask);
757 XGE_HAL_ALL_INTRS_DIS, &bar0->mac_int_mask);
759 XGE_HAL_ALL_INTRS_DIS, &bar0->mac_rmac_err_mask);
766 XGE_HAL_ALL_INTRS_DIS, &bar0->mac_int_mask);
768 XGE_HAL_ALL_INTRS_DIS, &bar0->mac_rmac_err_mask);
783 XGE_HAL_ALL_INTRS_DIS, &bar0->xgxs_int_mask);
789 XGE_HAL_ALL_INTRS_DIS, &bar0->xgxs_int_mask);
804 0x0ULL, &bar0->mc_int_mask);
811 XGE_HAL_ALL_INTRS_DIS, &bar0->mc_int_mask);
828 &bar0->tx_traffic_mask);
836 &bar0->tx_traffic_mask);
848 &bar0->rx_traffic_mask);
857 &bar0->rx_traffic_mask);
867 hldev->regh0, &bar0->txpic_int_mask);
870 temp64, &bar0->txpic_int_mask);
877 hldev->regh0, &bar0->txpic_int_mask);
881 temp64, &bar0->txpic_int_mask);
891 &bar0->general_int_mask);
953 xge_hal_pci_bar0_t *bar0;
956 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->isrbar0;
958 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1005 data1, &bar0->tti_data1_mem);
1007 &bar0->tti_data1_mem);
1009 data2, &bar0->tti_data2_mem);
1011 &bar0->tti_data2_mem);
1017 &bar0->tti_command_mem);
1019 if (!runtime && __hal_device_register_poll(hldev, &bar0->tti_command_mem,
1030 hldev->regh0, &bar0->tti_data1_mem));
1101 xge_hal_pci_bar0_t *bar0;
1115 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->isrbar0;
1117 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1162 data1, &bar0->rti_data1_mem);
1164 &bar0->rti_data1_mem);
1166 data2, &bar0->rti_data2_mem);
1168 &bar0->rti_data2_mem);
1176 &bar0->rti_command_mem);
1179 &bar0->rti_command_mem, 0,
1191 hldev->regh0, &bar0->rti_data1_mem));
1308 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1331 &bar0->dtx_control);
1341 &bar0->mdio_control);
1359 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1367 &bar0->mac_link_util);
1382 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1406 0xffffffffffffffffULL, &bar0->swapper_ctrl);
1412 &bar0->swapper_ctrl);
1428 0xffffffffffffffffULL, &bar0->swapper_ctrl);
1456 &bar0->swapper_ctrl);
1459 &bar0->swapper_ctrl);
1462 &bar0->swapper_ctrl);
1469 &bar0->pif_rd_swapper_fb);
1490 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1502 &bar0->rts_ctrl);
1505 val64, &bar0->rts_ctrl);
1518 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1531 &bar0->rts_ctrl);
1534 val64, &bar0->rts_ctrl);
1558 &bar0->rts_pn_cam_data);
1574 &bar0->rts_pn_cam_data);
1580 val64, &bar0->rts_pn_cam_ctrl);
1584 &bar0->rts_pn_cam_ctrl, 0,
1605 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1621 &bar0->rts_ds_mem_data);
1628 &bar0->rts_ds_mem_ctrl);
1633 &bar0->rts_ds_mem_ctrl, 0,
1651 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1652 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1653 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1654 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1655 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1659 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1660 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1661 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1662 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1664 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1668 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1670 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1672 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1674 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1676 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1680 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1681 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1682 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1683 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1685 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1689 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1691 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1693 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1695 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1697 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1701 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1703 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1705 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1707 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1709 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1713 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1715 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1717 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1719 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1721 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1725 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1726 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1727 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1728 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1730 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1832 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1849 &bar0->rts_ctrl);
1852 val64, &bar0->rts_ctrl);
1874 &bar0->rts_rth_map_mem_data);
1881 &bar0->rts_rth_map_mem_ctrl);
1885 &bar0->rts_rth_map_mem_ctrl, 0,
1901 &bar0->rts_rth_cfg);
1927 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1937 &bar0->rxpic_int_reg);
1983 if (__hal_device_register_poll(hldev, &bar0->rxpic_int_reg, 1,
2020 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
2035 hldev->regh0, &bar0->spdm_bir_offset);
2049 hldev->spdm_mem_base = (char *)bar0 +
2067 hldev->regh0, &bar0->spdm_structure);
2140 hldev->regh0, &bar0->rts_ctrl);
2143 val64, &bar0->rts_ctrl);
2155 0, &bar0->rts_rth_hash_mask[i]);
2159 0, &bar0->rts_rth_hash_mask_5);
2164 val64, &bar0->rts_rth_status);
2170 &bar0->rts_rth_cfg);
2321 xge_hal_pci_bar0_t *bar0 =
2322 (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
2324 &bar0->pci_info);
2447 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
2458 &bar0->misc_int_mask);
2462 val64, &bar0->misc_int_mask);
2472 &bar0->adapter_control);
2476 &bar0->adapter_control);
2480 &bar0->adapter_control);
2484 &bar0->adapter_control);
2489 &bar0->adapter_status);
2502 &bar0->misc_int_mask);
2506 &bar0->misc_int_mask);
2520 if (__hal_device_register_poll(hldev, &bar0->adapter_status, 0,
2547 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
2558 &bar0->misc_int_mask);
2562 val64, &bar0->misc_int_mask);
2572 &bar0->adapter_control);
2576 if (__hal_device_register_poll(hldev, &bar0->adapter_status, 0,
2587 &bar0->adapter_control);
2591 &bar0->adapter_control);
2600 &bar0->misc_int_mask);
2604 &bar0->misc_int_mask);
2641 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
2646 &bar0->adapter_control);
2763 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
2798 &bar0->txreqtimeout);
2801 &bar0->read_retry_delay);
2804 &bar0->write_retry_delay);
2817 &bar0->txreqtimeout);
2824 &bar0->read_retry_delay);
2827 &bar0->write_retry_delay);
2833 &bar0->pic_control_2);
2837 &bar0->pic_control_2);
2841 XGE_HAL_SW_RESET_XGXS, &bar0->sw_reset);
2847 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, 0, &bar0->sw_reset);
2849 &bar0->sw_reset);
2854 &bar0->mac_int_mask);
2856 &bar0->mc_int_mask);
2858 &bar0->xgxs_int_mask);
2881 &bar0->misc_control);
2886 val64, &bar0->misc_control);
2890 &bar0->misc_control);
2895 val64, &bar0->misc_control);
2975 &bar0->pcc_enable);
2984 if (__hal_device_register_poll(hldev, &bar0->adapter_status, 1,
3001 &bar0->pic_control);
3004 &bar0->pic_control);
3023 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
3043 &bar0->pif_rd_swapper_fb);
3048 (u32)(XGE_HAL_SW_RESET_ALL>>32), (char *)&bar0->sw_reset);
3059 &bar0->sw_reset);
3100 &bar0->sw_reset);
3137 &bar0->sw_reset);
3161 xge_hal_pci_bar0_t *bar0;
3164 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
3168 &bar0->serr_source);
3175 &bar0->misc_int_reg);
3191 &bar0->mac_rmac_err_reg);
3194 err_reg, &bar0->mac_rmac_err_reg);
4004 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4033 &bar0->misc_control);
4047 val64, &bar0->misc_control);
4054 &bar0->misc_int_reg);
4057 val64, &bar0->misc_int_reg);
4066 &bar0->mac_rmac_err_reg);
4069 val64, &bar0->mac_rmac_err_reg);
4080 &bar0->adapter_control);
4083 &bar0->adapter_control);
4093 &bar0->adapter_status);
4097 &bar0->adapter_control);
4101 &bar0->adapter_control);
4109 &bar0->adapter_control);
4118 &bar0->adapter_status);
4122 &bar0->adapter_control);
4143 &bar0->adapter_control);
4149 &bar0->adapter_control);
4155 &bar0->adapter_control);
4166 &bar0->adapter_control);
4169 val64, &bar0->adapter_control);
4176 &bar0->adapter_control);
4180 &bar0->adapter_control);
4194 &bar0->dtx_control);
4195 (void) __hal_serial_mem_read64(hldev, &bar0->dtx_control);
4198 &bar0->dtx_control);
4199 (void) __hal_serial_mem_read64(hldev, &bar0->dtx_control);
4202 &bar0->dtx_control);
4203 (void) __hal_serial_mem_read64(hldev, &bar0->dtx_control);
4217 &bar0->adapter_status);
4268 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4274 &bar0->adapter_control);
4277 &bar0->adapter_control);
4283 if (__hal_device_register_poll(hldev, &bar0->adapter_status, 1,
4368 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4372 &bar0->adapter_status);
4449 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
4452 &bar0->xmsi_mask_reg);
4459 &bar0->xmsi_mask_reg);
4580 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4610 &bar0->tx_traffic_mask);
4627 &bar0->rx_traffic_mask);
4648 &bar0->general_int_mask);
4677 xge_hal_pci_bar0_t *bar0;
4691 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4696 &bar0->rmac_addr_data0_mem);
4699 &bar0->rmac_addr_data1_mem);
4704 &bar0->rmac_addr_cmd_mem);
4707 &bar0->rmac_addr_cmd_mem, 0,
4732 xge_hal_pci_bar0_t *bar0;
4746 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4751 &bar0->rmac_addr_data0_mem);
4754 &bar0->rmac_addr_data1_mem);
4760 &bar0->rmac_addr_cmd_mem);
4763 &bar0->rmac_addr_cmd_mem, 0,
4785 xge_hal_pci_bar0_t *bar0;
4789 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4794 &bar0->mac_cfg);
4799 &bar0->rmac_cfg_key);
4803 &bar0->mac_cfg);
4824 xge_hal_pci_bar0_t *bar0;
4828 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4833 &bar0->mac_cfg);
4838 &bar0->rmac_cfg_key);
4842 &bar0->mac_cfg);
4874 xge_hal_pci_bar0_t *bar0;
4882 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4890 &bar0->rmac_addr_data0_mem);
4892 &bar0->rmac_addr_data1_mem);
4897 &bar0->rmac_addr_cmd_mem);
4901 &bar0->rmac_addr_cmd_mem, 0,
4911 &bar0->rmac_addr_cmd_mem);
4913 if (__hal_device_register_poll(hldev, &bar0->rmac_addr_cmd_mem, 0,
4921 &bar0->rmac_addr_data0_mem);
4959 xge_hal_pci_bar0_t *bar0 =
4960 (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4976 &bar0->rmac_addr_data0_mem);
4980 &bar0->rmac_addr_data1_mem);
4987 &bar0->rmac_addr_cmd_mem);
4989 if (__hal_device_register_poll(hldev, &bar0->rmac_addr_cmd_mem, 0,
5181 hldev->isrbar0 = hldev->bar0 = attr->bar0;
5202 xge_assert(hldev->bar0);
5666 xge_hal_pci_bar0_t *bar0 =
5667 (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
5673 hldev->regh0, &bar0->adapter_control);
5679 &bar0->adapter_control);
5759 xge_hal_pci_bar0_t *bar0 =
5760 (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
5766 &bar0->scheduled_int_ctrl);
5779 val64, &bar0->scheduled_int_ctrl);
5891 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
5899 &bar0->rts_rth_spdm_mem_ctrl);
5903 &bar0->rts_rth_spdm_mem_ctrl, 0,
5911 hldev->regh0, &bar0->rts_rth_spdm_mem_data);
6076 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
6155 &bar0->rts_rth_jhash_cfg);
6220 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
6241 if (__hal_device_register_poll(hldev, &bar0->rxpic_int_reg, 1,
6254 &bar0->rxpic_int_reg);
6257 &bar0->rxpic_int_reg);
6422 &bar0->rxpic_int_reg, 1,
6454 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
6462 &bar0->rx_traffic_mask);
6466 &bar0->rx_traffic_mask);
6480 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
6488 &bar0->tx_traffic_mask);
6492 &bar0->tx_traffic_mask);
6511 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
6520 &bar0->rx_mat);
6523 &bar0->rx_mat);
6530 &bar0->tx_mat[0]);
6533 &bar0->tx_mat[0]);
6621 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
6626 (u32)(val64 >> 32), &bar0->xmsi_access);
6628 (u32)(val64), &bar0->xmsi_access);
6631 &bar0->xmsi_access);
6638 &bar0->xmsi_data));
6640 &bar0->xmsi_address);
6658 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
6665 &bar0->rx_mat);
6668 &bar0->rx_mat);
6675 &bar0->tx_mat[0]);
6678 &bar0->tx_mat[0]);
6913 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
6921 &bar0->rts_ctrl);
6924 val64, &bar0->rts_ctrl);
6940 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
6948 &bar0->rts_ctrl);
6951 val64, &bar0->rts_ctrl);
6954 &bar0->rts_rth_cfg);
6975 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
6980 &bar0->rts_default_q);
6987 &bar0->rts_rth_cfg);
7001 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
7006 &bar0->rts_rth_cfg);
7009 &bar0->rts_rth_cfg);
7023 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
7027 &bar0->rts_rth_cfg);
7030 &bar0->rts_rth_cfg);
7048 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
7057 &bar0->rts_rth_map_mem_data);
7064 &bar0->rts_rth_map_mem_ctrl);
7068 &bar0->rts_rth_map_mem_ctrl, 0,
7094 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *) hldev->bar0;
7114 &bar0->rts_rth_hash_mask[nreg++]);
7121 &bar0->rts_rth_hash_mask[nreg++]);
7151 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
7167 &bar0->rts_mac_cfg);
7200 val64, &bar0->rts_mac_cfg);
7217 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
7223 &bar0->mc_rldram_test_ctrl);
7228 &bar0->mc_driver);
7233 &bar0->mc_rldram_mrs);
7238 &bar0->mc_rldram_mrs);
7243 &bar0->mc_rldram_test_add);
7247 &bar0->mc_rldram_test_add_bkg);
7252 &bar0->mc_rldram_test_ctrl);
7254 if (__hal_device_register_poll(hldev, &bar0->mc_rldram_test_ctrl, 1,
7263 &bar0->mc_rldram_test_ctrl);