Lines Matching defs:ahci_ctlp
515 ahci_ctl_t *ahci_ctlp = NULL;
529 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "ahci_attach enter",
544 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance);
545 mutex_enter(&ahci_ctlp->ahcictl_mutex);
548 if (ahci_ctlp->ahcictl_timeout_id == 0)
549 ahci_ctlp->ahcictl_timeout_id = timeout(
551 (caddr_t)ahci_ctlp, ahci_watchdog_tick);
553 mutex_exit(&ahci_ctlp->ahcictl_mutex);
562 if (ahci_initialize_controller(ahci_ctlp) != AHCI_SUCCESS) {
563 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PM, ahci_ctlp,
569 mutex_enter(&ahci_ctlp->ahcictl_mutex);
570 ahci_ctlp->ahcictl_flags &= ~ AHCI_SUSPEND;
571 mutex_exit(&ahci_ctlp->ahcictl_mutex);
589 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance);
590 ahci_ctlp->ahcictl_flags |= AHCI_ATTACH;
591 ahci_ctlp->ahcictl_dip = dip;
595 ahci_ctlp->ahcictl_port_to_cport[i] = 0xff;
596 ahci_ctlp->ahcictl_cport_to_port[i] = 0xff;
602 ahci_fm_init(ahci_ctlp);
641 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "rnumber = %d", rnumber);
645 (caddr_t *)&ahci_ctlp->ahcictl_ahci_addr,
649 &ahci_ctlp->ahcictl_ahci_acc_handle);
659 ahci_version = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
660 (uint32_t *)AHCI_GLOBAL_VS(ahci_ctlp));
675 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
676 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp));
678 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba capabilities = 0x%x",
685 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
688 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
691 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
697 ahci_ctlp->ahcictl_num_cmd_slots =
701 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of cmd slots: %d",
702 ahci_ctlp->ahcictl_num_cmd_slots);
705 ahci_ctlp->ahcictl_ports_implemented =
706 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
707 (uint32_t *)AHCI_GLOBAL_PI(ahci_ctlp));
709 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba implementation of ports: 0x%x",
710 ahci_ctlp->ahcictl_ports_implemented);
720 ahci_ctlp->ahcictl_num_ports = max(
722 ddi_fls(ahci_ctlp->ahcictl_ports_implemented));
724 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of ports: %d",
725 ahci_ctlp->ahcictl_num_ports);
728 ahci_ctlp->ahcictl_num_implemented_ports =
730 ahci_ctlp->ahcictl_ports_implemented);
732 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
734 ahci_ctlp->ahcictl_num_implemented_ports);
738 ahci_ctlp->ahcictl_cap |= AHCI_CAP_BUF_32BIT_DMA;
739 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA;
740 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
746 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_CBSS;
747 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp,
752 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_FBSS;
753 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp,
760 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SCLO;
761 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp,
767 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SNTF;
768 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp,
772 if (pci_config_setup(dip, &ahci_ctlp->ahcictl_pci_conf_handle)
789 if (ahci_config_space_init(ahci_ctlp) == AHCI_FAILURE) {
799 ahci_disable_all_intrs(ahci_ctlp);
808 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp,
816 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_MSI) ==
818 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_MSI;
819 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp,
824 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp,
830 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_FIXED) ==
832 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_FIXED;
833 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp,
838 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp,
851 mutex_init(&ahci_ctlp->ahcictl_mutex, NULL, MUTEX_DRIVER,
852 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri);
866 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
872 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_sgllen =
875 ahci_ctlp->ahcictl_buffer_dma_attr = buffer_dma_attr;
876 ahci_ctlp->ahcictl_rcvd_fis_dma_attr = rcvd_fis_dma_attr;
877 ahci_ctlp->ahcictl_cmd_list_dma_attr = cmd_list_dma_attr;
878 ahci_ctlp->ahcictl_cmd_table_dma_attr = cmd_table_dma_attr;
885 ((ahci_ctlp->ahcictl_cap & AHCI_CAP_BUF_32BIT_DMA) &&
887 ahci_ctlp->ahcictl_venid == 0x1002 &&
888 ahci_ctlp->ahcictl_devid == 0x4380))) {
889 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_addr_hi =
898 ((ahci_ctlp->ahcictl_cap & AHCI_CAP_COMMU_32BIT_DMA) &&
900 ahci_ctlp->ahcictl_venid == 0x1002 &&
901 (ahci_ctlp->ahcictl_devid == 0x4380 ||
902 ahci_ctlp->ahcictl_devid == 0x4391)))) {
903 ahci_ctlp->ahcictl_rcvd_fis_dma_attr.dma_attr_addr_hi =
905 ahci_ctlp->ahcictl_cmd_list_dma_attr.dma_attr_addr_hi =
907 ahci_ctlp->ahcictl_cmd_table_dma_attr.dma_attr_addr_hi =
912 status = ahci_alloc_ports_state(ahci_ctlp);
924 status = ahci_initialize_controller(ahci_ctlp);
934 ahci_ctlp->ahcictl_timeout_id = timeout(
936 (caddr_t)ahci_ctlp, ahci_watchdog_tick);
940 if (ahci_register_sata_hba_tran(ahci_ctlp, cap_status)) {
947 if (ahci_check_all_handle(ahci_ctlp) != DDI_SUCCESS) {
953 ahci_ctlp->ahcictl_flags &= ~AHCI_ATTACH;
955 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "ahci_attach success!", NULL);
961 ahci_fm_ereport(ahci_ctlp, DDI_FM_DEVICE_NO_RESPONSE);
962 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, DDI_SERVICE_LOST);
965 mutex_enter(&ahci_ctlp->ahcictl_mutex);
966 (void) untimeout(ahci_ctlp->ahcictl_timeout_id);
967 ahci_ctlp->ahcictl_timeout_id = 0;
968 mutex_exit(&ahci_ctlp->ahcictl_mutex);
972 ahci_uninitialize_controller(ahci_ctlp);
976 ahci_dealloc_ports_state(ahci_ctlp);
980 mutex_destroy(&ahci_ctlp->ahcictl_mutex);
984 ahci_rem_intrs(ahci_ctlp);
988 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle);
992 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle);
996 ahci_fm_fini(ahci_ctlp);
1012 ahci_ctl_t *ahci_ctlp;
1017 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance);
1019 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_detach enter", NULL);
1025 mutex_enter(&ahci_ctlp->ahcictl_mutex);
1026 ahci_disable_all_intrs(ahci_ctlp);
1027 mutex_exit(&ahci_ctlp->ahcictl_mutex);
1030 ret = ahci_unregister_sata_hba_tran(ahci_ctlp);
1032 mutex_enter(&ahci_ctlp->ahcictl_mutex);
1033 ahci_enable_all_intrs(ahci_ctlp);
1034 mutex_exit(&ahci_ctlp->ahcictl_mutex);
1038 mutex_enter(&ahci_ctlp->ahcictl_mutex);
1041 (void) untimeout(ahci_ctlp->ahcictl_timeout_id);
1042 ahci_ctlp->ahcictl_timeout_id = 0;
1044 mutex_exit(&ahci_ctlp->ahcictl_mutex);
1047 ahci_uninitialize_controller(ahci_ctlp);
1050 ahci_rem_intrs(ahci_ctlp);
1053 ahci_dealloc_ports_state(ahci_ctlp);
1056 mutex_destroy(&ahci_ctlp->ahcictl_mutex);
1059 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle);
1062 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle);
1065 ahci_fm_fini(ahci_ctlp);
1079 mutex_enter(&ahci_ctlp->ahcictl_mutex);
1080 if (ahci_ctlp->ahcictl_flags & AHCI_SUSPEND) {
1081 mutex_exit(&ahci_ctlp->ahcictl_mutex);
1085 ahci_ctlp->ahcictl_flags |= AHCI_SUSPEND;
1088 if (ahci_ctlp->ahcictl_timeout_id) {
1089 (void) untimeout(ahci_ctlp->ahcictl_timeout_id);
1090 ahci_ctlp->ahcictl_timeout_id = 0;
1093 mutex_exit(&ahci_ctlp->ahcictl_mutex);
1098 ahci_drain_ports_taskq(ahci_ctlp);
1103 ahci_uninitialize_controller(ahci_ctlp);
1124 ahci_ctl_t *ahci_ctlp;
1133 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance);
1134 if (ahci_ctlp != NULL) {
1135 *result = ahci_ctlp->ahcictl_dip;
1155 ahci_register_sata_hba_tran(ahci_ctl_t *ahci_ctlp, uint32_t cap_status)
1159 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp,
1162 mutex_enter(&ahci_ctlp->ahcictl_mutex);
1168 sata_hba_tran->sata_tran_hba_dip = ahci_ctlp->ahcictl_dip;
1170 &ahci_ctlp->ahcictl_buffer_dma_attr;
1174 ahci_ctlp->ahcictl_num_implemented_ports;
1181 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PIO_MDRQ;
1182 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports multiple "
1202 !(ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE)) {
1204 ahci_ctlp->ahcictl_cap |= AHCI_CAP_NCQ;
1205 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports Native "
1222 sata_hba_tran->sata_tran_hba_qdepth = ahci_ctlp->ahcictl_num_cmd_slots;
1239 ahci_ctlp->ahcictl_sata_hba_tran = sata_hba_tran;
1241 mutex_exit(&ahci_ctlp->ahcictl_mutex);
1244 if (sata_hba_attach(ahci_ctlp->ahcictl_dip, sata_hba_tran, DDI_ATTACH)
1247 mutex_enter(&ahci_ctlp->ahcictl_mutex);
1248 ahci_ctlp->ahcictl_sata_hba_tran = NULL;
1249 mutex_exit(&ahci_ctlp->ahcictl_mutex);
1260 ahci_unregister_sata_hba_tran(ahci_ctl_t *ahci_ctlp)
1262 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
1266 if (sata_hba_detach(ahci_ctlp->ahcictl_dip, DDI_DETACH) !=
1272 kmem_free((void *)ahci_ctlp->ahcictl_sata_hba_tran,
1275 mutex_enter(&ahci_ctlp->ahcictl_mutex);
1276 ahci_ctlp->ahcictl_sata_hba_tran = NULL;
1277 mutex_exit(&ahci_ctlp->ahcictl_mutex);
1304 ahci_ctl_t *ahci_ctlp;
1314 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip));
1315 port = ahci_ctlp->ahcictl_cport_to_port[cport];
1317 ahci_portp = ahci_ctlp->ahcictl_ports[port];
1321 ahci_get_ahci_addr(ahci_ctlp, sd, &addr);
1325 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
1332 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp,
1357 rval_init = ahci_initialize_pmult(ahci_ctlp,
1360 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp,
1368 (void) ahci_probe_pmult(ahci_ctlp, ahci_portp, &addr);
1371 if (ahci_probe_pmport(ahci_ctlp, ahci_portp,
1385 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1391 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1397 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1403 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
1409 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
1421 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
1433 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
1446 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
1453 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
1461 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
1469 ahci_update_sata_registers(ahci_ctlp, port, sd);
1472 if (ahci_update_pmult_pscr(ahci_ctlp,
1478 if ((ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) ||
1479 (ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS)) {
1480 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip,
1521 ahci_ctl_t *ahci_ctlp;
1528 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip));
1529 port = ahci_ctlp->ahcictl_cport_to_port[cport];
1531 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
1535 ahci_portp = ahci_ctlp->ahcictl_ports[port];
1538 ahci_get_ahci_addr(ahci_ctlp, &spkt->satapkt_device, &addr);
1549 ahci_update_sata_registers(ahci_ctlp, port,
1551 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1561 ahci_initialize_pmport(ahci_ctlp,
1568 ahci_update_sata_registers(ahci_ctlp, port,
1570 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1591 ahci_update_sata_registers(ahci_ctlp, port,
1593 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1610 ahci_update_sata_registers(ahci_ctlp, port,
1612 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1621 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1631 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1658 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1667 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1676 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1684 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1691 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) {
1692 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip,
1707 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1716 if (ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr,
1722 if (ahci_deliver_satapkt(ahci_ctlp, ahci_portp, &addr, spkt)
1729 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_tran_start "
1740 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS ||
1741 ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS) {
1751 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_tran_start "
1767 ahci_do_sync_start(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
1773 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip);
1776 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_do_sync_start enter: "
1781 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp,
1794 ahci_port_intr(ahci_ctlp, ahci_portp, port);
1806 ahci_timeout_pkts(ahci_ctlp, ahci_portp,
1815 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp,
1862 ahci_claim_free_slot(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
1869 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_claim_free_slot enter "
1883 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp,
1891 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp,
1898 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE) &&
1900 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
1907 AHCI_SLOT_MASK(ahci_ctlp);
1911 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp,
1930 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS) &&
1934 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
1947 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
1957 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
1958 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, addrp->aa_port));
1961 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp,
1971 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
1980 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp,
2003 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp,
2019 ahci_deliver_satapkt(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
2031 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip);
2067 AHCIDBG(AHCIDBG_NCQ, ahci_ctlp,
2094 cmd_slot = ahci_claim_free_slot(ahci_ctlp, ahci_portp,
2097 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "no free command slot", NULL);
2101 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INFO, ahci_ctlp,
2214 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp,
2233 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp,
2261 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "command data direction is "
2313 ahci_log(ahci_ctlp, CE_WARN, "\n");
2314 ahci_log(ahci_ctlp, CE_WARN, "Command header&table for spkt "
2318 ahci_log(ahci_ctlp, CE_WARN,
2324 ahci_log(ahci_ctlp, CE_WARN,
2332 ahci_log(ahci_ctlp, CE_WARN,
2343 ahci_log(ahci_ctlp, CE_WARN,
2365 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip,
2372 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
2373 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port),
2378 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
2379 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port),
2382 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_deliver_satapkt "
2386 if (ahci_check_acc_handle(ahci_ctlp->
2388 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip,
2404 ahci_ctl_t *ahci_ctlp;
2414 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance);
2415 port = ahci_ctlp->ahcictl_cport_to_port[cport];
2417 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
2420 ahci_portp = ahci_ctlp->ahcictl_ports[port];
2428 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
2441 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
2459 ahci_update_sata_registers(ahci_ctlp, port,
2461 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
2478 ahci_update_sata_registers(ahci_ctlp, port,
2480 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
2502 tmp_slot < ahci_ctlp->ahcictl_num_cmd_slots; tmp_slot++) {
2511 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
2514 ahci_update_sata_registers(ahci_ctlp, port,
2524 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
2525 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
2527 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
2528 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
2542 (void) ahci_restart_port_wait_till_ready(ahci_ctlp,
2555 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp);
2562 ahci_mop_commands(ahci_ctlp,
2570 ahci_update_sata_registers(ahci_ctlp, port, &spkt->satapkt_device);
2584 ahci_reset_device_reject_pkts(ahci_ctl_t *ahci_ctlp,
2594 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
2602 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
2609 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
2610 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
2611 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp);
2613 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
2614 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
2618 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp)
2620 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
2623 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp);
2625 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
2639 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port];
2646 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip,
2651 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp,
2657 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp);
2664 ahci_mop_commands(ahci_ctlp,
2683 ahci_reset_pmdevice_reject_pkts(ahci_ctl_t *ahci_ctlp,
2691 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_PMULT, ahci_ctlp,
2695 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
2703 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
2704 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
2705 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp);
2707 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
2708 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
2713 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp)
2715 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
2729 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port];
2739 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip,
2744 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp,
2751 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp);
2757 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp,
2767 ahci_mop_commands(ahci_ctlp,
2785 ahci_reset_port_reject_pkts(ahci_ctl_t *ahci_ctlp,
2793 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
2801 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
2811 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
2812 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
2813 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp);
2815 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
2816 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
2820 if (ahci_restart_port_wait_till_ready(ahci_ctlp,
2834 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp);
2841 ahci_mop_commands(ahci_ctlp,
2857 ahci_reset_hba_reject_pkts(ahci_ctl_t *ahci_ctlp)
2866 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
2873 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
2874 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) {
2878 ahci_portp = ahci_ctlp->ahcictl_ports[port];
2884 ahci_ctlp->ahcictl_ahci_acc_handle,
2885 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
2887 AHCI_SLOT_MASK(ahci_ctlp);
2888 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
2894 ahci_ctlp->ahcictl_ahci_acc_handle,
2895 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
2898 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
2906 if (ahci_hba_reset(ahci_ctlp) != AHCI_SUCCESS) {
2910 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
2911 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) {
2915 ahci_portp = ahci_ctlp->ahcictl_ports[port];
2923 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
2936 ~slot_status[port] & AHCI_SLOT_MASK(ahci_ctlp);
2944 ahci_mop_commands(ahci_ctlp,
2963 ahci_ctl_t *ahci_ctlp;
2972 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance);
2973 port = ahci_ctlp->ahcictl_cport_to_port[cport];
2974 ahci_portp = ahci_ctlp->ahcictl_ports[port];
2976 ahci_get_ahci_addr(ahci_ctlp, sd, &addr);
2978 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
2997 ahci_portp = ahci_ctlp->ahcictl_ports[port];
3002 ret = ahci_reset_port_reject_pkts(ahci_ctlp, ahci_portp, &addr);
3035 ahci_update_sata_registers(ahci_ctlp, port, sd);
3036 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
3054 ahci_update_sata_registers(ahci_ctlp, port, sd);
3055 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
3064 ret = ahci_reset_device_reject_pkts(ahci_ctlp,
3067 ret = ahci_reset_pmdevice_reject_pkts(ahci_ctlp,
3078 ret = ahci_reset_hba_reject_pkts(ahci_ctlp);
3096 ahci_ctl_t *ahci_ctlp;
3104 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance);
3105 port = ahci_ctlp->ahcictl_cport_to_port[cport];
3107 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
3110 ahci_portp = ahci_ctlp->ahcictl_ports[port];
3113 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr);
3121 ahci_enable_port_intrs(ahci_ctlp, port);
3130 (void) ahci_restart_port_wait_till_ready(ahci_ctlp,
3153 ahci_update_sata_registers(ahci_ctlp, port, satadev);
3167 ahci_ctl_t *ahci_ctlp;
3176 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance);
3177 port = ahci_ctlp->ahcictl_cport_to_port[cport];
3179 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
3182 ahci_portp = ahci_ctlp->ahcictl_ports[port];
3184 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr);
3192 ahci_disable_port_intrs(ahci_ctlp, port);
3197 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port);
3200 (void) ahci_put_port_into_notrunning_state(ahci_ctlp,
3205 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
3206 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port));
3208 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, (uint32_t *)
3209 AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol);
3214 ahci_disable_port_intrs(ahci_ctlp, port);
3217 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port);
3220 ahci_enable_port_intrs(ahci_ctlp, port);
3227 ahci_update_sata_registers(ahci_ctlp, port, satadev);
3240 ahci_reject_all_abort_pkts(ahci_ctl_t *ahci_ctlp,
3246 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp,
3268 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
3277 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
3278 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
3279 abort_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp);
3281 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
3282 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
3292 ahci_mop_commands(ahci_ctlp,
3314 ahci_fm_init(ahci_ctl_t *ahci_ctlp)
3321 ahci_ctlp->ahcictl_fm_cap = ddi_getprop(DDI_DEV_T_ANY,
3322 ahci_ctlp->ahcictl_dip,
3328 if (ahci_ctlp->ahcictl_fm_cap) {
3341 ddi_fm_init(ahci_ctlp->ahcictl_dip,
3342 &ahci_ctlp->ahcictl_fm_cap, &fm_ibc);
3344 if (ahci_ctlp->ahcictl_fm_cap == DDI_FM_NOT_CAPABLE) {
3346 ddi_get_instance(ahci_ctlp->ahcictl_dip));
3353 if (DDI_FM_EREPORT_CAP(ahci_ctlp->ahcictl_fm_cap) ||
3354 DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) {
3355 pci_ereport_setup(ahci_ctlp->ahcictl_dip);
3361 if (DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) {
3362 ddi_fm_handler_register(ahci_ctlp->ahcictl_dip,
3363 ahci_fm_error_cb, (void *) ahci_ctlp);
3366 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
3375 ahci_fm_fini(ahci_ctl_t *ahci_ctlp)
3378 if (ahci_ctlp->ahcictl_fm_cap) {
3382 if (DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) {
3383 ddi_fm_handler_unregister(ahci_ctlp->ahcictl_dip);
3389 if (DDI_FM_EREPORT_CAP(ahci_ctlp->ahcictl_fm_cap) ||
3390 DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) {
3391 pci_ereport_teardown(ahci_ctlp->ahcictl_dip);
3395 ddi_fm_fini(ahci_ctlp->ahcictl_dip);
3404 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
3443 ahci_fm_ereport(ahci_ctl_t *ahci_ctlp, char *detail)
3450 if (DDI_FM_EREPORT_CAP(ahci_ctlp->ahcictl_fm_cap)) {
3451 ddi_fm_ereport_post(ahci_ctlp->ahcictl_dip, buf, ena,
3462 ahci_check_all_handle(ahci_ctl_t *ahci_ctlp)
3465 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) {
3468 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
3469 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port))
3471 if (ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS) {
3483 ahci_check_ctl_handle(ahci_ctl_t *ahci_ctlp)
3485 if ((ahci_check_acc_handle(ahci_ctlp->
3487 (ahci_check_acc_handle(ahci_ctlp->
3500 ahci_check_port_handle(ahci_ctl_t *ahci_ctlp, int port)
3502 ahci_port_t *ahci_portp = ahci_ctlp->ahcictl_ports[port];
3514 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots;
3544 ahci_alloc_ports_state(ahci_ctl_t *ahci_ctlp)
3548 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp,
3551 mutex_enter(&ahci_ctlp->ahcictl_mutex);
3554 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
3555 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) {
3556 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
3561 ahci_ctlp->ahcictl_cport_to_port[cport] = (uint8_t)port;
3562 ahci_ctlp->ahcictl_port_to_cport[port] =
3565 if (ahci_alloc_port_state(ahci_ctlp, port) != AHCI_SUCCESS) {
3570 mutex_exit(&ahci_ctlp->ahcictl_mutex);
3575 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) {
3576 ahci_dealloc_port_state(ahci_ctlp, port);
3580 mutex_exit(&ahci_ctlp->ahcictl_mutex);
3588 ahci_dealloc_ports_state(ahci_ctl_t *ahci_ctlp)
3592 mutex_enter(&ahci_ctlp->ahcictl_mutex);
3593 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
3595 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port))
3596 ahci_dealloc_port_state(ahci_ctlp, port);
3598 mutex_exit(&ahci_ctlp->ahcictl_mutex);
3605 ahci_drain_ports_taskq(ahci_ctl_t *ahci_ctlp)
3610 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
3611 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) {
3615 ahci_portp = ahci_ctlp->ahcictl_ports[port];
3636 ahci_initialize_controller(ahci_ctl_t *ahci_ctlp)
3643 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp,
3646 mutex_enter(&ahci_ctlp->ahcictl_mutex);
3652 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
3653 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp));
3656 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
3657 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp),
3660 mutex_exit(&ahci_ctlp->ahcictl_mutex);
3663 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
3664 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) {
3668 ahci_portp = ahci_ctlp->ahcictl_ports[port];
3677 if (ahci_initialize_port(ahci_ctlp, ahci_portp, &addr)
3679 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
3693 mutex_enter(&ahci_ctlp->ahcictl_mutex);
3694 ahci_enable_all_intrs(ahci_ctlp);
3695 mutex_exit(&ahci_ctlp->ahcictl_mutex);
3706 ahci_uninitialize_controller(ahci_ctl_t *ahci_ctlp)
3711 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
3715 mutex_enter(&ahci_ctlp->ahcictl_mutex);
3716 ahci_disable_all_intrs(ahci_ctlp);
3717 mutex_exit(&ahci_ctlp->ahcictl_mutex);
3719 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
3720 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) {
3724 ahci_portp = ahci_ctlp->ahcictl_ports[port];
3736 ahci_disable_port_intrs(ahci_ctlp, port);
3737 (void) ahci_put_port_into_notrunning_state(ahci_ctlp,
3754 ahci_alloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp)
3759 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
3760 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
3767 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
3768 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port),
3771 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp,
3796 ahci_dealloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp)
3801 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
3802 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
3806 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
3807 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port),
3810 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp,
3835 ahci_initialize_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
3859 mutex_enter(&ahci_ctlp->ahcictl_mutex);
3860 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH)
3862 mutex_exit(&ahci_ctlp->ahcictl_mutex);
3872 AHCIDBG(AHCIDBG_PM, ahci_ctlp,
3878 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle,
3879 (uint64_t *)AHCI_PORT_PxFB(ahci_ctlp, port),
3883 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle,
3884 (uint64_t *)AHCI_PORT_PxCLB(ahci_ctlp, port),
3888 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
3889 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
3891 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp,
3903 (void) ahci_put_port_into_notrunning_state(ahci_ctlp,
3908 ahci_disable_port_intrs(ahci_ctlp, port);
3914 ahci_disable_interface_pm(ahci_ctlp, port);
3916 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
3917 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port));
3918 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
3919 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port));
3930 ahci_ctlp->ahcictl_cap & AHCI_CAP_INIT_PORT_RESET ||
3936 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp);
3940 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp,
3949 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp,
3956 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "port %d is ready now.", port);
3962 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp);
3966 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
3973 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp,
3975 ahci_alloc_pmult(ahci_ctlp, ahci_portp);
3979 if (ahci_start_port(ahci_ctlp, ahci_portp, port)
3981 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
3987 ahci_enable_port_intrs(ahci_ctlp, port);
3997 ahci_config_space_init(ahci_ctl_t *ahci_ctlp)
4006 ahci_ctlp->ahcictl_venid =
4007 pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle,
4010 ahci_ctlp->ahcictl_devid =
4011 pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle,
4029 if (ahci_ctlp->ahcictl_venid == VIA_VENID) {
4030 revision = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle,
4032 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
4035 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_align = 0x4;
4036 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
4040 ahci_ctlp->ahcictl_cap |= AHCI_CAP_NO_MCMDLIST_NONQUEUE;
4041 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
4045 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT;
4068 if (ahci_ctlp->ahcictl_venid == 0x1002 &&
4069 ahci_ctlp->ahcictl_devid == 0x4380) {
4070 ahci_ctlp->ahcictl_cap |= AHCI_CAP_BUF_32BIT_DMA;
4071 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA;
4072 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET;
4073 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT;
4075 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
4079 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
4082 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
4103 if (ahci_ctlp->ahcictl_venid == 0x1002 &&
4104 ahci_ctlp->ahcictl_devid == 0x4391) {
4105 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA;
4106 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET;
4107 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT;
4109 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
4113 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
4116 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
4125 if (pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle,
4128 ahci_ctlp->ahcictl_pci_conf_handle,
4144 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
4149 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
4159 cap = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle,
4165 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PM;
4168 ahci_ctlp->ahcictl_pmcsr_offset = caps_ptr + PCI_PMCSR;
4172 ahci_ctlp->ahcictl_pci_conf_handle,
4175 ahci_ctlp->ahcictl_pci_conf_handle,
4176 ahci_ctlp->ahcictl_pmcsr_offset);
4177 AHCIDBG(AHCIDBG_PM, ahci_ctlp,
4181 AHCIDBG(AHCIDBG_PM, ahci_ctlp,
4190 ahci_ctlp->ahcictl_pci_conf_handle,
4192 AHCIDBG(AHCIDBG_MSI, ahci_ctlp,
4196 AHCIDBG(AHCIDBG_MSI, ahci_ctlp,
4201 AHCIDBG(AHCIDBG_PM, ahci_ctlp,
4206 AHCIDBG(AHCIDBG_PM, ahci_ctlp,
4211 AHCIDBG(AHCIDBG_PM, ahci_ctlp,
4216 AHCIDBG(AHCIDBG_PM, ahci_ctlp,
4221 AHCIDBG(AHCIDBG_PM, ahci_ctlp,
4226 AHCIDBG(AHCIDBG_PM, ahci_ctlp,
4235 ahci_ctlp->ahcictl_pci_conf_handle,
4250 ahci_rdwr_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp,
4266 cport = ahci_ctlp->ahcictl_port_to_cport[port];
4267 ahci_portp = ahci_ctlp->ahcictl_ports[port];
4302 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp,
4312 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp,
4328 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp,
4336 spkt = sata_get_rdwr_pmult_pkt(ahci_ctlp->ahcictl_dip,
4348 intr_mask = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
4349 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port));
4350 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
4351 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0);
4353 rval = ahci_do_sync_start(ahci_ctlp, ahci_portp, &pmult_addr, spkt);
4366 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp,
4374 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
4375 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), intr_mask);
4384 ahci_read_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp,
4387 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, pregv,
4392 ahci_write_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp,
4395 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, ®v,
4400 if (ahci_read_pmult(ahci_ctlp, addrp, r, pv) != AHCI_SUCCESS) \
4404 if (ahci_write_pmult(ahci_ctlp, addrp, r, v) != AHCI_SUCCESS) \
4416 ahci_update_pmult_gscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp,
4431 ahci_update_pmult_pscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp,
4458 ahci_initialize_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
4466 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp,
4477 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp,
4485 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
4486 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port),
4488 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp,
4498 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp,
4504 if (ahci_update_pmult_gscr(ahci_ctlp, addrp, &sg) != AHCI_SUCCESS)
4509 sata_register_pmult(ahci_ctlp->ahcictl_dip, sd, &sg);
4515 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp,
4535 ahci_initialize_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
4545 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp,
4550 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp,
4564 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
4565 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
4566 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp);
4568 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
4569 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
4582 ahci_disable_port_intrs(ahci_ctlp, port);
4585 if (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp) != AHCI_SUCCESS) {
4586 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp,
4596 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
4607 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
4615 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
4625 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp);
4633 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp);
4639 ahci_mop_commands(ahci_ctlp,
4648 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) {
4649 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
4650 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port),
4655 ahci_enable_port_intrs(ahci_ctlp, port);
4669 ahci_probe_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
4690 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp,
4719 sdevice.satadev_addr.cport = ahci_ctlp->
4725 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp,
4732 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp,
4739 ahci_ctlp->ahcictl_sata_hba_tran->
4747 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp,
4754 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp,
4760 ahci_ctlp->ahcictl_sata_hba_tran->
4770 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp,
4782 ahci_ctlp->ahcictl_sata_hba_tran->
4807 ahci_probe_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
4824 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp,
4834 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp,
4838 if (ahci_restart_port_wait_till_ready(ahci_ctlp,
4841 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp,
4855 if (ahci_initialize_pmult(ahci_ctlp, ahci_portp,
4868 if (ahci_initialize_pmport(ahci_ctlp,
4891 ahci_software_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
4903 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
4907 if (ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp,
4909 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
4915 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
4916 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port));
4920 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_SCLO)) {
4921 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
4932 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
4935 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
4936 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
4937 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
4938 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port),
4949 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
4955 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
4956 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
4960 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
4961 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port));
4964 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
4972 if (ahci_start_port(ahci_ctlp, ahci_portp, port)
4974 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
5022 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5023 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port),
5030 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5031 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
5035 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
5042 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot));
5044 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp,
5082 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5083 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port),
5090 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5091 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
5095 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
5103 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot));
5105 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp,
5110 if ((ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) ||
5111 (ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS)) {
5112 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip,
5119 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
5148 ahci_port_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
5159 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip);
5163 return (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp));
5168 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp,
5172 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5173 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp));
5175 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5176 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
5186 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
5200 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
5210 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
5220 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
5224 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5225 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port));
5228 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5229 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port),
5233 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5234 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port),
5245 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5246 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port));
5248 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5249 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port),
5253 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5254 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port));
5258 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5259 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port),
5263 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5264 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port),
5271 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5272 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
5274 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5275 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port),
5279 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5280 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port),
5301 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5302 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port));
5324 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp,
5340 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5341 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port));
5342 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5343 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port));
5367 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5368 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port));
5370 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: "
5380 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5381 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port),
5403 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: "
5408 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5409 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port),
5415 if (ahci_software_reset(ahci_ctlp, ahci_portp,
5435 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5436 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port));
5440 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp,
5446 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5447 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port),
5454 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp,
5465 ahci_pmport_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
5474 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip);
5476 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp,
5487 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5488 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
5548 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp,
5559 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp,
5592 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5593 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port));
5614 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp,
5620 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5621 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port),
5629 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp,
5636 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp,
5657 ahci_hba_reset(ahci_ctl_t *ahci_ctlp)
5666 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "HBA resetting",
5669 mutex_enter(&ahci_ctlp->ahcictl_mutex);
5671 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5672 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp));
5676 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5677 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control);
5684 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5685 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp));
5688 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
5699 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp,
5705 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
5707 mutex_exit(&ahci_ctlp->ahcictl_mutex);
5714 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5715 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp));
5717 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5718 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control);
5720 mutex_exit(&ahci_ctlp->ahcictl_mutex);
5722 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
5724 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) {
5728 ahci_portp = ahci_ctlp->ahcictl_ports[port];
5733 if (ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp,
5737 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
5765 ahci_find_dev_signature(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
5789 (ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_CBSS)) {
5790 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
5801 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
5811 rval = ahci_software_reset(ahci_ctlp, ahci_portp, &dev_addr);
5819 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_SRST_NO_HOSTPORT) &&
5822 rval = ahci_software_reset(ahci_ctlp, ahci_portp,
5827 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
5843 if (ahci_put_port_into_notrunning_state(ahci_ctlp,
5845 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
5854 signature = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5855 (uint32_t *)AHCI_PORT_PxSIG(ahci_ctlp, port));
5859 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp,
5863 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp,
5877 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
5883 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
5891 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
5897 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
5913 ahci_disable_interface_pm(ahci_ctl_t *ahci_ctlp, uint8_t port)
5917 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5918 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port));
5920 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5921 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol);
5923 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5924 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
5926 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5927 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status);
5950 ahci_start_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port)
5954 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_start_port: %d enter", port);
5957 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed "
5964 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed "
5970 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5971 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
5975 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5976 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port),
5980 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
5981 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
5985 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
5986 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port),
5991 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port: "
6006 ahci_alloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port)
6008 dev_info_t *dip = ahci_ctlp->ahcictl_dip;
6015 ahci_ctlp->ahcictl_ports[port] = ahci_portp;
6023 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri);
6031 if (ahci_alloc_rcvd_fis(ahci_ctlp, ahci_portp, port) != AHCI_SUCCESS) {
6035 if (ahci_alloc_cmd_list(ahci_ctlp, ahci_portp, port) != AHCI_SUCCESS) {
6047 "handle", ddi_get_instance(ahci_ctlp->ahcictl_dip));
6074 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp);
6096 ahci_dealloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port)
6098 ahci_port_t *ahci_portp = ahci_ctlp->ahcictl_ports[port];
6109 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp);
6111 ahci_dealloc_pmult(ahci_ctlp, ahci_portp);
6119 ahci_ctlp->ahcictl_ports[port] = NULL;
6129 ahci_alloc_rcvd_fis(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
6139 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip,
6140 &ahci_ctlp->ahcictl_rcvd_fis_dma_attr,
6145 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
6161 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
6178 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
6189 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle,
6190 (uint64_t *)AHCI_PORT_PxFB(ahci_ctlp, port),
6193 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx",
6195 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x",
6229 ahci_alloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
6237 ahci_ctlp->ahcictl_num_cmd_slots * sizeof (ahci_cmd_header_t);
6240 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip,
6241 &ahci_ctlp->ahcictl_cmd_list_dma_attr,
6246 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
6261 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
6278 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
6289 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle,
6290 (uint64_t *)AHCI_PORT_PxCLB(ahci_ctlp, port),
6293 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx",
6296 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x",
6299 if (ahci_alloc_cmd_tables(ahci_ctlp, ahci_portp) != AHCI_SUCCESS) {
6325 ahci_dealloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp)
6328 ahci_dealloc_cmd_tables(ahci_ctlp, ahci_portp);
6348 ahci_alloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp)
6355 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp,
6359 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) {
6361 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip,
6362 &ahci_ctlp->ahcictl_cmd_table_dma_attr,
6368 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
6386 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
6406 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
6458 ahci_dealloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp)
6462 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
6466 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) {
6488 ahci_update_sata_registers(ahci_ctl_t *ahci_ctlp, uint8_t port,
6492 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
6493 (uint32_t *)(AHCI_PORT_PxSSTS(ahci_ctlp, port)));
6495 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
6496 (uint32_t *)(AHCI_PORT_PxSERR(ahci_ctlp, port)));
6498 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
6499 (uint32_t *)(AHCI_PORT_PxSCTL(ahci_ctlp, port)));
6501 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
6502 (uint32_t *)(AHCI_PORT_PxSACT(ahci_ctlp, port)));
6509 ahci_port_intr(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port)
6514 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp,
6538 port_intr_enable = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
6539 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port));
6551 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
6552 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port));
6554 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
6565 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) {
6566 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip,
6568 ddi_fm_acc_err_clear(ahci_ctlp->ahcictl_ahci_acc_handle,
6574 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
6575 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port),
6581 (void) ahci_intr_cmd_cmplt(ahci_ctlp,
6587 (void) ahci_intr_set_device_bits(ahci_ctlp,
6593 (void) ahci_intr_port_connect_change(ahci_ctlp,
6600 ahci_ctlp, ahci_portp, port);
6605 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp,
6625 (void) ahci_intr_non_fatal_error(ahci_ctlp, ahci_portp,
6646 (void) ahci_intr_fatal_error(ahci_ctlp, ahci_portp,
6651 (void) ahci_intr_cold_port_detect(ahci_ctlp, ahci_portp, port);
6655 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
6656 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (0x1 << port));
6659 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle) !=
6661 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip,
6663 ddi_fm_acc_err_clear(ahci_ctlp->ahcictl_ahci_acc_handle,
6678 ahci_ctl_t *ahci_ctlp = (ahci_ctl_t *)arg1;
6687 global_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
6688 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp));
6690 if (!(global_intr_status & ahci_ctlp->ahcictl_ports_implemented)) {
6699 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle) !=
6701 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip,
6703 ddi_fm_acc_err_clear(ahci_ctlp->ahcictl_ahci_acc_handle,
6709 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
6710 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) {
6717 ahci_portp = ahci_ctlp->ahcictl_ports[port];
6720 ahci_port_intr(ahci_ctlp, ahci_portp, port);
6757 ahci_intr_cmd_cmplt(ahci_ctl_t *ahci_ctlp,
6782 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
6783 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
6786 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle)
6795 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
6801 AHCIDBG(AHCIDBG_INFO, ahci_ctlp,
6809 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp);
6812 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
6823 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
6836 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
6890 AHCIDBG(AHCIDBG_INTR|AHCIDBG_PRDT, ahci_ctlp,
6898 AHCIDBG(AHCIDBG_UNDERFLOW, ahci_ctlp,
6927 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
6938 AHCIDBG(AHCIDBG_PKTCOMP, ahci_ctlp,
6976 ahci_intr_set_device_bits(ahci_ctl_t *ahci_ctlp,
6981 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp,
6988 (void) ahci_intr_ncq_events(ahci_ctlp, ahci_portp, &addr);
6991 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) {
6992 (void) ahci_intr_pmult_sntf_events(ahci_ctlp,
7008 ahci_intr_ncq_events(ahci_ctl_t *ahci_ctlp,
7020 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp,
7033 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7034 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
7039 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp,
7044 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp,
7051 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7052 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
7055 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp);
7058 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle)
7064 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp,
7069 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp,
7099 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp,
7110 AHCIDBG(AHCIDBG_PKTCOMP|AHCIDBG_NCQ, ahci_ctlp,
7133 ahci_intr_pmult_sntf_events(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
7138 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp,
7142 mutex_enter(&ahci_ctlp->ahcictl_mutex);
7143 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH) {
7144 mutex_exit(&ahci_ctlp->ahcictl_mutex);
7147 mutex_exit(&ahci_ctlp->ahcictl_mutex);
7158 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7159 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port));
7160 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
7161 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port),
7195 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp,
7202 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp,
7211 sdevice.satadev_addr.cport = ahci_ctlp->
7218 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port);
7222 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip,
7252 ahci_intr_port_connect_change(ahci_ctl_t *ahci_ctlp,
7262 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7263 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port));
7265 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp,
7271 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
7272 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port),
7293 ahci_intr_device_mechanical_presence_status(ahci_ctl_t *ahci_ctlp,
7298 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp,
7302 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7303 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp));
7306 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7307 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
7311 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
7322 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
7327 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
7359 ahci_intr_phyrdy_change(ahci_ctl_t *ahci_ctlp,
7368 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp,
7373 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
7374 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port),
7378 mutex_enter(&ahci_ctlp->ahcictl_mutex);
7379 if ((ahci_ctlp->ahcictl_sata_hba_tran == NULL) ||
7382 mutex_exit(&ahci_ctlp->ahcictl_mutex);
7385 mutex_exit(&ahci_ctlp->ahcictl_mutex);
7390 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7391 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port));
7403 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
7411 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port];
7423 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp,
7429 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip,
7435 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp,
7444 (void) ahci_initialize_port(ahci_ctlp,
7448 if (ahci_start_port(ahci_ctlp, ahci_portp, port)
7451 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
7461 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip,
7470 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp,
7474 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port);
7475 (void) ahci_put_port_into_notrunning_state(ahci_ctlp,
7480 ahci_dealloc_pmult(ahci_ctlp, ahci_portp);
7489 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip,
7548 ahci_intr_non_fatal_error(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
7565 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7566 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port));
7568 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY|AHCIDBG_ERRS, ahci_ctlp,
7572 ahci_log_serror_message(ahci_ctlp, port, port_serror, 1);
7575 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
7579 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
7580 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port),
7586 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci port %d "
7591 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp,
7596 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp,
7605 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7606 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
7620 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp,
7625 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp,
7641 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp,
7654 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7655 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
7657 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7658 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
7660 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ|AHCIDBG_ERRS, ahci_ctlp,
7678 ahci_ctlp, "ahci_intr_non_fatal_error: "
7773 ahci_intr_fatal_error(ahci_ctl_t *ahci_ctlp,
7783 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip);
7795 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp,
7802 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7803 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port));
7804 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp,
7826 ahci_ctlp->ahcictl_ahci_acc_handle,
7827 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
7833 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp,
7858 ahci_ctlp->ahcictl_ahci_acc_handle,
7859 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
7866 ahci_log_fatal_error_message(ahci_ctlp, port, intr_status);
7869 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7870 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port));
7873 ahci_log_serror_message(ahci_ctlp, port, port_serror, 0);
7882 ahci_dump_commands(ahci_ctlp, port, failed_tags);
7889 args->ahciea_ctlp = (void *)ahci_ctlp;
7921 ahci_intr_cold_port_detect(ahci_ctl_t *ahci_ctlp,
7927 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
7932 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
7933 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
7935 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
7942 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
7946 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port];
7952 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
7956 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip,
7962 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
7966 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip,
7984 ahci_enable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port)
7986 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
7992 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
7993 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port),
7999 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
8000 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (1 << port));
8017 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
8018 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port),
8041 ahci_enable_all_intrs(ahci_ctl_t *ahci_ctlp)
8045 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_enable_all_intrs enter", NULL);
8047 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
8048 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp));
8052 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
8053 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control);
8063 ahci_disable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port)
8065 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
8068 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
8069 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0);
8082 ahci_disable_all_intrs(ahci_ctl_t *ahci_ctlp)
8086 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_disable_all_intrs enter",
8089 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
8090 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp));
8094 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
8095 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control);
8139 ahci_add_intrs(ahci_ctl_t *ahci_ctlp, int intr_type)
8141 dev_info_t *dip = ahci_ctlp->ahcictl_dip;
8145 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp,
8151 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp,
8160 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp,
8168 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp,
8183 AHCIDBG(AHCIDBG_INTR, ahci_ctlp,
8190 ahci_ctlp->ahcictl_intr_size = count * sizeof (ddi_intr_handle_t);
8191 ahci_ctlp->ahcictl_intr_htable =
8192 kmem_alloc(ahci_ctlp->ahcictl_intr_size, KM_SLEEP);
8195 rc = ddi_intr_alloc(dip, ahci_ctlp->ahcictl_intr_htable,
8199 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp,
8202 kmem_free(ahci_ctlp->ahcictl_intr_htable,
8203 ahci_ctlp->ahcictl_intr_size);
8210 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp,
8215 ahci_ctlp->ahcictl_intr_cnt = actual;
8220 if (ddi_intr_get_pri(ahci_ctlp->ahcictl_intr_htable[0],
8221 &ahci_ctlp->ahcictl_intr_pri) != DDI_SUCCESS) {
8222 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp,
8227 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]);
8230 kmem_free(ahci_ctlp->ahcictl_intr_htable,
8231 ahci_ctlp->ahcictl_intr_size);
8236 if (ahci_ctlp->ahcictl_intr_pri >= ddi_intr_get_hilevel_pri()) {
8237 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp,
8242 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]);
8245 kmem_free(ahci_ctlp->ahcictl_intr_htable,
8253 if (ddi_intr_add_handler(ahci_ctlp->ahcictl_intr_htable[i],
8254 ahci_intr, (caddr_t)ahci_ctlp, NULL) != DDI_SUCCESS) {
8255 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp,
8261 ahci_ctlp->ahcictl_intr_htable[i]);
8264 kmem_free(ahci_ctlp->ahcictl_intr_htable,
8265 ahci_ctlp->ahcictl_intr_size);
8270 if (ddi_intr_get_cap(ahci_ctlp->ahcictl_intr_htable[0],
8271 &ahci_ctlp->ahcictl_intr_cap) != DDI_SUCCESS) {
8272 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp,
8278 ahci_ctlp->ahcictl_intr_htable[i]);
8281 kmem_free(ahci_ctlp->ahcictl_intr_htable,
8282 ahci_ctlp->ahcictl_intr_size);
8286 if (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK) {
8288 (void) ddi_intr_block_enable(ahci_ctlp->ahcictl_intr_htable,
8289 ahci_ctlp->ahcictl_intr_cnt);
8292 for (i = 0; i < ahci_ctlp->ahcictl_intr_cnt; i++) {
8294 ahci_ctlp->ahcictl_intr_htable[i]);
8309 ahci_rem_intrs(ahci_ctl_t *ahci_ctlp)
8313 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_rem_intrs entered", NULL);
8316 if ((ahci_ctlp->ahcictl_intr_type == DDI_INTR_TYPE_MSI) &&
8317 (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK)) {
8319 (void) ddi_intr_block_disable(ahci_ctlp->ahcictl_intr_htable,
8320 ahci_ctlp->ahcictl_intr_cnt);
8322 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) {
8324 ahci_ctlp->ahcictl_intr_htable[x]);
8329 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) {
8331 ahci_ctlp->ahcictl_intr_htable[x]);
8332 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[x]);
8335 kmem_free(ahci_ctlp->ahcictl_intr_htable, ahci_ctlp->ahcictl_intr_size);
8347 ahci_put_port_into_notrunning_state(ahci_ctl_t *ahci_ctlp,
8353 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
8356 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
8357 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
8360 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
8361 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status);
8367 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
8368 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
8371 AHCIDBG(AHCIDBG_INIT, ahci_ctlp,
8389 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp,
8395 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp,
8438 ahci_restart_port_wait_till_ready(ahci_ctl_t *ahci_ctlp,
8451 uint8_t cport = ahci_ctlp->ahcictl_port_to_cport[port];
8453 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
8462 rval = ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp,
8473 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
8474 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port),
8478 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
8479 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port));
8495 ahci_disable_port_intrs(ahci_ctlp, port);
8496 rval = ahci_port_reset(ahci_ctlp, ahci_portp, &addr_port);
8497 ahci_enable_port_intrs(ahci_ctlp, port);
8501 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
8518 ahci_ctlp->ahcictl_port_to_cport[port];
8524 if (ahci_ctlp->ahcictl_sata_hba_tran) {
8527 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip,
8533 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp,
8540 (void) ahci_start_port(ahci_ctlp, ahci_portp, port);
8543 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
8544 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port));
8555 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
8559 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
8563 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp, port);
8582 ahci_find_dev_signature(ahci_ctlp, ahci_portp, &addr_port);
8590 ahci_dealloc_pmult(ahci_ctlp, ahci_portp);
8591 (void) ahci_start_port(ahci_ctlp, ahci_portp, port);
8612 ahci_dealloc_pmult(ahci_ctlp, ahci_portp);
8613 (void) ahci_start_port(ahci_ctlp, ahci_portp, port);
8617 ahci_ctlp->ahcictl_port_to_cport[port];
8626 ahci_ctlp->ahcictl_dip,
8631 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
8633 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp,
8643 ahci_alloc_pmult(ahci_ctlp, ahci_portp);
8645 (void) ahci_start_port(ahci_ctlp, ahci_portp, port);
8681 sata_hba_event_notify(ahci_ctlp->ahcictl_dip, &sdevice,
8700 ahci_mop_commands(ahci_ctl_t *ahci_ctlp,
8716 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp,
8720 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp,
8747 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp);
8750 AHCI_SLOT_MASK(ahci_ctlp) &
8782 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_NCQ, ahci_ctlp,
8791 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp,
8800 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp,
8815 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_mop_commands: "
8847 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: "
8856 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
8872 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: "
8893 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: "
8902 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
8918 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: "
8939 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: "
8949 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
8965 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: "
8985 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
9001 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: "
9025 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: "
9054 ahci_get_rdlogext_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
9067 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_NCQ, ahci_ctlp,
9072 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port];
9078 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr);
9085 rdlog_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip,
9094 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
9112 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rdlog_spkt);
9131 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
9135 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
9142 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
9146 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
9156 ahci_update_sata_registers(ahci_ctlp, port,
9173 ahci_get_rqsense_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
9186 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
9191 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port];
9197 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr);
9206 rs_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip,
9216 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
9234 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rs_spkt);
9256 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, "\n", NULL);
9257 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp,
9260 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp,
9299 ahci_fatal_error_recovery_handler(ahci_ctl_t *ahci_ctlp,
9314 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip);
9317 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
9323 ahci_pmult_error_recovery_handler(ahci_ctlp, ahci_portp,
9334 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
9335 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
9341 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
9342 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
9364 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp,
9389 ahci_update_sata_registers(ahci_ctlp, port,
9394 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
9395 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
9408 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
9424 rval = ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp,
9456 failed_tags = ahci_get_rdlogext_data(ahci_ctlp,
9467 ahci_get_rqsense_data(ahci_ctlp, ahci_portp, port, spkt);
9469 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
9476 ahci_mop_commands(ahci_ctlp,
9497 ahci_pmult_error_recovery_handler(ahci_ctl_t *ahci_ctlp,
9508 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS))
9511 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
9512 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port));
9523 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
9524 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port));
9528 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp,
9534 ahci_reject_all_abort_pkts(ahci_ctlp,
9537 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle,
9538 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port),
9547 port_fbs_ctrl = ddi_get32(ahci_ctlp->
9549 AHCI_PORT_PxFBS(ahci_ctlp, port));
9566 (void) ahci_software_reset(ahci_ctlp,
9583 ahci_ctl_t *ahci_ctlp;
9591 ahci_ctlp = ahci_event_arg->ahciea_ctlp;
9595 instance = ddi_get_instance(ahci_ctlp->ahcictl_dip);
9597 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp,
9608 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp,
9626 ahci_fatal_error_recovery_handler(ahci_ctlp, ahci_portp,
9638 ahci_timeout_pkts(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp,
9645 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_ENTRY, ahci_ctlp,
9654 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
9655 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port));
9658 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
9659 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
9671 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp,
9681 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp,
9692 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp,
9701 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp);
9704 AHCIDBG(AHCIDBG_TIMEOUT, ahci_ctlp,
9715 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_NCQ, ahci_ctlp,
9726 ahci_mop_commands(ahci_ctlp,
9742 ahci_watchdog_handler(ahci_ctl_t *ahci_ctlp)
9754 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip);
9756 mutex_enter(&ahci_ctlp->ahcictl_mutex);
9758 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp,
9761 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
9762 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) {
9766 ahci_portp = ahci_ctlp->ahcictl_ports[port];
9782 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle,
9783 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port));
9796 ahci_ctlp->ahcictl_ahci_acc_handle,
9797 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port));
9835 ahci_ctlp, "watchdog: the current "
9839 ahci_ctlp, "watchdog: the current "
9868 mutex_exit(&ahci_ctlp->ahcictl_mutex);
9869 ahci_timeout_pkts(ahci_ctlp, ahci_portp,
9871 mutex_enter(&ahci_ctlp->ahcictl_mutex);
9879 if (ahci_ctlp->ahcictl_timeout_id != 0) {
9880 ahci_ctlp->ahcictl_timeout_id =
9882 (caddr_t)ahci_ctlp, ahci_watchdog_tick);
9885 mutex_exit(&ahci_ctlp->ahcictl_mutex);
9959 ahci_log_fatal_error_message(ahci_ctl_t *ahci_ctlp, uint8_t port,
9962 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip);
9985 ahci_dump_commands(ahci_ctl_t *ahci_ctlp, uint8_t port,
9993 ahci_portp = ahci_ctlp->ahcictl_ports[port];
10029 ahci_log_serror_message(ahci_ctl_t *ahci_ctlp, uint8_t port,
10117 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg_header, NULL);
10118 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg, NULL);
10119 } else if (ahci_ctlp) {
10121 ddi_get_instance(ahci_ctlp->ahcictl_dip),
10125 sata_trace_debug(ahci_ctlp->ahcictl_dip,
10126 "ahci%d: %s %s", ddi_get_instance(ahci_ctlp->ahcictl_dip),
10141 ahci_get_ahci_addr(ahci_ctl_t *ahci_ctlp, sata_device_t *sd,
10146 ahci_ctlp->ahcictl_cport_to_port[sata_addrp->cport];
10190 ahci_log(ahci_ctl_t *ahci_ctlp, uint_t level, char *fmt, ...)
10198 if (ahci_ctlp) {
10200 ddi_get_instance(ahci_ctlp->ahcictl_dip));
10227 ahci_ctl_t *ahci_ctlp;
10232 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance);
10234 if (ahci_ctlp == NULL)
10242 ahci_disable_all_intrs(ahci_ctlp);
10244 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) {
10245 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) {
10249 ahci_portp = ahci_ctlp->ahcictl_ports[port];
10260 ahci_disable_port_intrs(ahci_ctlp, port);
10261 (void) ahci_put_port_into_notrunning_state(ahci_ctlp,