io/rtw/rtw.c

1213 	uint32_t phybaseaddr, ptx[RTW_NTXPRI], prx;
1228 	phybaseaddr = rsc->sc_desc_dma.cookie.dmac_address;
1230 	ptx[0] = RTW_RING_BASE(phybaseaddr, hd_txlo);
1231 	ptx[1] = RTW_RING_BASE(phybaseaddr, hd_txmd);
1232 	ptx[2] = RTW_RING_BASE(phybaseaddr, hd_txhi);
1233 	ptx[3] = RTW_RING_BASE(phybaseaddr, hd_bcn);
1276 	prx = RTW_RING_BASE(phybaseaddr, hd_rx);
1311 	uint32_t phybaseaddr;
1313 	phybaseaddr = rsc->sc_desc_dma.cookie.dmac_address;
1315 	RTW_WRITE(regs, RTW_RDSAR, RTW_RING_BASE(phybaseaddr, hd_rx));
1316 	RTW_WRITE(regs, RTW_TLPDA, RTW_RING_BASE(phybaseaddr, hd_txlo));
1317 	RTW_WRITE(regs, RTW_TNPDA, RTW_RING_BASE(phybaseaddr, hd_txmd));
1318 	RTW_WRITE(regs, RTW_THPDA, RTW_RING_BASE(phybaseaddr, hd_txhi));
1319 	RTW_WRITE(regs, RTW_TBDA, RTW_RING_BASE(phybaseaddr, hd_bcn));
1331 	uint32_t phybaseaddr, ptx[RTW_NTXPRI], baddr_desc, taddr_desc;
1333 	phybaseaddr = rsc->sc_desc_dma.cookie.dmac_address;
1334 	ptx[0] = RTW_RING_BASE(phybaseaddr, hd_txlo);
1335 	ptx[1] = RTW_RING_BASE(phybaseaddr, hd_txmd);
1336 	ptx[2] = RTW_RING_BASE(phybaseaddr, hd_txhi);
1337 	ptx[3] = RTW_RING_BASE(phybaseaddr, hd_bcn);