io/pciex/pcie_pwr.c

77  *	using counters.
110 	int *counters = pwr_p->pwr_counters;
154 		ASSERT(!counters[PCIE_D0_INDEX] &&
155 		    !counters[PCIE_UNKNOWN_INDEX]);
269 	int *counters = pwr_p->pwr_counters; /* nexus counters */
270 	int *child_counters; /* per child dip counters */
353 		 * then add the components to the counters. This can't
399 		/* Modify counters appropriately */
400 		pwr_update_counters(counters, old_level, new_level);
480 	int *counters = pwr_p->pwr_counters;
496 		if (counters[i]) {
517  * Update the counters with number pm components of the child
538 	 * Allocate counters per child. This is a part of pcie
555  * Remove the pm components of a child from our counters.
568 			 * any counters for this device. This also means that
579 	PCIE_DBG("%s(%d): pcie_remove_comps:counters decremented because of "
584 	 * Adjust the nexus counters. No need to adjust per child dip
585 	 * counters as we are freeing the per child dip info.
753  * sets up the counters. All the components of the child device are
794  * Adjust the counters when a child detaches
801 	int *counters;
809 	counters = pwr_p->pwr_counters;
817 	total = (counters[PCIE_D0_INDEX] + counters[PCIE_UNKNOWN_INDEX] +
818 	    counters[PCIE_D1_INDEX] + counters[PCIE_D2_INDEX] +
819 	    counters[PCIE_D3_INDEX]);
937 	int i, *counters; /* per nexus counters */
938 	int *child_counters = NULL; /* per child dip counters */
970 		counters = pwr_p->pwr_counters;
972 		 * Update the nexus counters. At the resume time all
974 		 * fact that counters for unknown level are at the end.
977 			counters[PCIE_UNKNOWN_INDEX] += counters[i];
978 			counters[i] = 0;
1004 		 * Update per child dip counters, if any. Counters