io/nxge/nxge_rxdma.c

287 	npi_status_t		rs = NPI_SUCCESS;
293 	rs = npi_rxdma_cfg_rdc_reset(handle, channel);
295 	if (rs != NPI_SUCCESS) {
296 		status = NXGE_ERROR | rs;
347 	npi_status_t		rs = NPI_SUCCESS;
353 	rs = npi_rxdma_dump_rdc_regs(handle, channel);
355 	if (rs != NPI_SUCCESS) {
356 		status = NXGE_ERROR | rs;
367 	npi_status_t		rs = NPI_SUCCESS;
374 	rs = npi_rxdma_event_mask(handle, OP_SET, channel, mask_p);
375 	if (rs != NPI_SUCCESS) {
376 		status = NXGE_ERROR | rs;
387 	npi_status_t		rs = NPI_SUCCESS;
394 	rs = npi_rxdma_control_status(handle, OP_SET, channel, cs_p);
396 	if (rs != NPI_SUCCESS) {
397 		status = NXGE_ERROR | rs;
431 	npi_status_t		rs = NPI_SUCCESS;
452 	rs = npi_rxdma_cfg_rdc_table_default_rdc(
455 	if (rs != NPI_SUCCESS) {
456 		return (NXGE_ERROR | rs);
469 	npi_status_t		rs = NPI_SUCCESS;
476 	rs = npi_rxdma_cfg_default_port_rdc(handle, port, actual_rdc);
479 	if (rs != NPI_SUCCESS) {
480 		return (NXGE_ERROR | rs);
492 	npi_status_t	rs = NPI_SUCCESS;
498 	rs = npi_rxdma_cfg_rdc_rcr_threshold(handle, channel, pkts);
500 	if (rs != NPI_SUCCESS) {
501 		return (NXGE_ERROR | rs);
511 	npi_status_t	rs = NPI_SUCCESS;
516 		rs = npi_rxdma_cfg_rdc_rcr_timeout_disable(handle, channel);
518 		rs = npi_rxdma_cfg_rdc_rcr_timeout(handle, channel,
522 	if (rs != NPI_SUCCESS) {
523 		return (NXGE_ERROR | rs);
536 	npi_status_t		rs = NPI_SUCCESS;
603 		rs = npi_rxdma_cfg_rdc_ring(handle, rbr_p->rdc,
606 		rs = npi_rxdma_cfg_rdc_ring(handle, rbr_p->rdc,
608 	if (rs != NPI_SUCCESS) {
609 		return (NXGE_ERROR | rs);
615 	rs = npi_rxdma_cfg_rdc_rcr_threshold(handle, channel,
617 	if (rs != NPI_SUCCESS) {
618 		return (NXGE_ERROR | rs);
621 	rs = npi_rxdma_cfg_rdc_rcr_timeout(handle, channel,
623 	if (rs != NPI_SUCCESS) {
624 		return (NXGE_ERROR | rs);
629 		rs = npi_rxdma_cfg_rdc_enable(handle, channel);
630 		if (rs != NPI_SUCCESS) {
631 			return (NXGE_ERROR | rs);
652 	npi_status_t		rs = NPI_SUCCESS;
658 	rs = npi_rxdma_cfg_rdc_disable(handle, channel);
659 	if (rs != NPI_SUCCESS) {
662 		    rs));
663 		return (NXGE_ERROR | rs);
1211 	npi_status_t rs;
1246 					rs = npi_rxdma_cfg_rdc_enable
1252 					rs = npi_rxdma_cfg_rdc_disable
1259 	status = ((rs == NPI_SUCCESS) ? NXGE_OK : NXGE_ERROR | rs);
1978 	npi_status_t		rs = NPI_SUCCESS;
2001 	rs = npi_rxdma_rdc_rcr_qlen_get(handle, channel, &qlen);
2002 	if (rs != NPI_SUCCESS) {
2005 		    channel, rs));
2924 	npi_status_t		rs;
2991 		if ((rs = npi_rxdma_ring_perr_stat_get(handle,
2998 			return (NXGE_ERROR | rs);
4220 	npi_status_t		rs = NPI_SUCCESS;
4235 		rs = npi_rxdma_cfg_rdc_reset(handle, channel);
4236 		if (rs != NPI_SUCCESS) {
4240 			    channel, rs));
4241 			return (NXGE_ERROR | rs);
4276 	rs = npi_rxdma_event_mask(handle, OP_SET, channel,
4278 	if (rs != NPI_SUCCESS) {
4284 		return (NXGE_ERROR | rs);
4346 	rs = npi_rxdma_event_mask(handle, OP_SET, channel,
4348 	if (rs != NPI_SUCCESS) {
4353 		return (NXGE_ERROR | rs);
4368 	npi_status_t		rs = NPI_SUCCESS;
4398 	rs = npi_rxdma_cfg_rdc_reset(handle, channel);
4399 	if (rs != NPI_SUCCESS) {
4403 		    rs, channel));
4404 		return (NXGE_ERROR | rs);
4412 	rs = npi_rxdma_event_mask(handle, OP_SET, channel,
4414 	if (rs != NPI_SUCCESS) {
4418 		    rs, channel));
4419 		return (NXGE_ERROR | rs);
4483 	npi_status_t		rs = NPI_SUCCESS;
4489 	rs = npi_rxdma_rxctl_fifo_error_intr_get(handle, &stat);
4491 	if (rs != NPI_SUCCESS)
4492 		return (NXGE_ERROR | rs);
4594 	npi_status_t		rs = NPI_SUCCESS;
4627 	rs = npi_rxdma_cfg_rdc_disable(handle, channel);
4628 	if (rs != NPI_SUCCESS) {
4638 	rs = npi_rxdma_event_mask(handle, OP_SET, channel, &ent_mask);
4639 	if (rs != NPI_SUCCESS) {
4649 	rs = npi_rxdma_cfg_rdc_reset(handle, channel);
4650 	if (rs != NPI_SUCCESS) {
4727 	return (NXGE_ERROR | rs);