nxge/npi/npi_txdma.c

264 		mode32.bits.ldw.mode32 = 1;
266 		mode32.bits.ldw.mode32 = 0;
328 	vld.bits.ldw.func = cfgp->func_num;
353 	    vld.bits.ldw.func,
406 	vld.bits.ldw.func = cfgp->func_num;
415 	cfgp->func_num = vld.bits.ldw.func;
424 		cfgp->valid = vld.bits.ldw.page0;
432 		cfgp->valid = vld.bits.ldw.page1;
441  *	(bits [63:44] of a 64-bit address to generate
721  *	 all other bits except RST_STATE).
938 		cs.bits.ldw.rst = 1;
950 		 * the RW bits but leave the RO bits alone.
953 		cs.bits.ldw.rst = 1;
960 		cs.bits.ldw.stop_n_go = 0;
967 		cs.bits.ldw.stop_n_go = 1;
987 		cs.bits.ldw.mk = 1;
997 		cs.bits.ldw.mb = 1;
1446 		ml.bits.ldw.mbaddr = ((*mbox_addr & TXDMA_MBL_MASK) >>
1449 		mh.bits.ldw.mbaddr = ((*mbox_addr >> TXDMA_MBH_ADDR_SHIFT) &
1516 		desc_p->bits.hdw.sop = 1;
1517 		desc_p->bits.hdw.mark = mark;
1518 		desc_p->bits.hdw.num_ptr = ngathers;
1521 		    desc_p->bits.hdw.tr_len, transfer_len));
1524 	desc_p->bits.hdw.tr_len = transfer_len;
1525 	desc_p->bits.hdw.sad = dma_ioaddr >> 32;
1526 	desc_p->bits.ldw.sad = dma_ioaddr & 0xffffffff;
1530 	    desc_p->bits.hdw.tr_len, transfer_len));
1560 	desc_p->bits.hdw.sop = 1;
1561 	desc_p->bits.hdw.mark = mark_mode;
1562 	desc_p->bits.hdw.num_ptr = ngathers;
1577 	desc_p->bits.hdw.sop = 1;
1578 	desc_p->bits.hdw.mark = mark_mode;
1579 	desc_p->bits.hdw.num_ptr = ngathers;
1580 	desc_p->bits.hdw.tr_len += extra;
1594 	desc_p->bits.hdw.tr_len = transfer_len;
1598 	    desc_p->bits.hdw.tr_len, transfer_len));
1679 	kick.bits.ldw.wrap = wrap;
1680 	kick.bits.ldw.tail = tail_index;
1820 	ring_errlog_p->logh.bits.ldw.err = logh.bits.ldw.err;
1821 	ring_errlog_p->logh.bits.ldw.merr = logh.bits.ldw.merr;
1822 	ring_errlog_p->logh.bits.ldw.errcode = logh.bits.ldw.errcode;
1823 	ring_errlog_p->logh.bits.ldw.err_addr = logh.bits.ldw.err_addr;
1824 	ring_errlog_p->logl.bits.ldw.err_addr = logl.bits.ldw.err_addr;
1843 	inj.bits.ldw.inject_parity_error = (err_bits & TDMC_INJ_PAR_ERR_MASK);
1880 	dbg.bits.ldw.dbg_sel = (dbg_sel & TDMC_DBG_SEL_MASK);
1893 	vec.bits.ldw.vec = training_vector;
1940 	    desp->bits.hdw.tr_len,
1942 	    desp->bits.hdw.num_ptr,
1943 	    desp->bits.hdw.mark,
1944 	    desp->bits.hdw.sop));
1963 	    hdrp->bits.hdw.cksum_en_pkt_type,
1964 	    hdrp->bits.hdw.ip_ver,
1965 	    hdrp->bits.hdw.llc,
1966 	    hdrp->bits.hdw.vlan,
1967 	    hdrp->bits.hdw.ihl,
1968 	    hdrp->bits.hdw.l3start,
1969 	    hdrp->bits.hdw.l4start,
1970 	    hdrp->bits.hdw.l4stuff,
1971 	    hdrp->bits.ldw.tot_xfer_len,
1972 	    hdrp->bits.ldw.pad));
2011 		if (!txcs.bits.ldw.rst) {
2020 		    "cleared to 0 txcs.bits 0x%llx", txcs.value));
2035 		if (txcs.bits.ldw.sng_state) {
2044 		    "set to 1 txcs.bits 0x%llx", txcs.value));
2060 		if (!txcs.bits.ldw.sng_state) {
2069 		    "set to 0 txcs.bits 0x%llx", txcs.value));