io/ixgbe/ixgbe_main.c

4662 ixgbe_map_rxring_to_vector(ixgbe_t *ixgbe, int r_idx, int v_idx)
4667 	BT_SET(ixgbe->vect_map[v_idx].rx_map, r_idx);
4672 	ixgbe->vect_map[v_idx].rxr_cnt++;
4677 	ixgbe->rx_rings[r_idx].intr_vector = v_idx;
4678 	ixgbe->rx_rings[r_idx].vect_bit = 1 << v_idx;
4686 ixgbe_map_txring_to_vector(ixgbe_t *ixgbe, int t_idx, int v_idx)
4691 	BT_SET(ixgbe->vect_map[v_idx].tx_map, t_idx);
4696 	ixgbe->vect_map[v_idx].txr_cnt++;
4701 	ixgbe->tx_rings[t_idx].intr_vector = v_idx;
4702 	ixgbe->tx_rings[t_idx].vect_bit = 1 << v_idx;
4984 	int v_idx;	/* vector index */
4992 		for (v_idx = 0; v_idx < 25; v_idx++)
4993 			IXGBE_WRITE_REG(hw, IXGBE_IVAR(v_idx), 0);
4997 		for (v_idx = 0; v_idx < 64; v_idx++)
4998 			IXGBE_WRITE_REG(hw, IXGBE_IVAR(v_idx), 0);
5024 	for (v_idx = 0; v_idx < ixgbe->intr_cnt; v_idx++) {
5025 		vect = &ixgbe->vect_map[v_idx];
5035 			ixgbe_setup_ivar(ixgbe, hw_index, v_idx, 0);
5047 			ixgbe_setup_ivar(ixgbe, r_idx, v_idx, 1);
5539 	int v_idx = rx_ring->intr_vector;
5559 	BT_SET(ixgbe->vect_map[v_idx].rx_map, r_idx);
5564 	IXGBE_WRITE_REG(&ixgbe->hw, IXGBE_EICS, (1 << v_idx));
5582 	int v_idx = rx_ring->intr_vector;
5610 	BT_CLEAR(ixgbe->vect_map[v_idx].rx_map, r_idx);