io/ixgbe/ixgbe_common.c

592 		DEBUGOUT3("Eeprom params: type = %d, size = %d, address bits: "
930  * This function clears hardware semaphore bits.
941 	/* Release both semaphores by writing 0 to the bits SWESMBI and SMBI */
1014  * ixgbe_shift_out_eeprom_bits - Shift data bits out to the EEPROM.
1017  * @count: number of bits to shift out
1032 	 * Mask is used to shift "count" bits of "data" out to the EEPROM
1072  * ixgbe_shift_in_eeprom_bits - Shift data bits in from the EEPROM
1086 	 * 'count' bits in from the EEPROM. Bits are "shifted in" by raising
1369 		 * Some parts put the VMDq setting in the extra RAH bits,
1370 		 * so save everything except the lower 16 bits that hold part
1407 		 * Some parts put the VMDq setting in the extra RAH bits,
1408 		 * so save everything except the lower 16 bits that hold part
1603  * Extracts the 12 bits, from a multicast address, to determine which
1604  * bit-vector to set in the multicast table. The hardware uses 12 bits, from
1606  * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
1618 	case 0:   /* use bits [47:36] of the address */
1621 	case 1:   /* use bits [46:35] of the address */
1624 	case 2:   /* use bits [45:34] of the address */
1627 	case 3:   /* use bits [43:32] of the address */
1636 	/* vector can only be 12-bits or boundary will be exceeded */
1664 	 * like an array of 4096 bits.  We want to set bit
1667 	 * register is determined by the upper 7 bits of the vector value and
1668 	 * the bit within that register are determined by the lower 5 bits of
2386 		 * SW_FW_SYNC/GSSR bits (not just EEPROM)
2709 		/* already there so just add to the pool bits */
2841 	u32 bits = 0;
2854 		bits = IXGBE_READ_REG(hw, IXGBE_VLVF(regindex));
2855 		if (!bits && !(first_empty_slot))
2857 		else if ((bits & 0x0FFF) == vlan)
2893 	u32 bits;
2913 	 *    bits[11-5]: which register
2914 	 *    bits[4-0]:  which bit in the register
2954 				bits = IXGBE_READ_REG(hw,
2956 				bits |= (1 << vind);
2959 				    bits);
2961 				bits = IXGBE_READ_REG(hw,
2963 				bits |= (1 << (vind - 32));
2966 				    bits);
2971 				bits = IXGBE_READ_REG(hw,
2973 				bits &= ~(1 << vind);
2976 				    bits);
2977 				bits |= IXGBE_READ_REG(hw,
2980 				bits = IXGBE_READ_REG(hw,
2982 				bits &= ~(1 << (vind - 32));
2985 				    bits);
2986 				bits |= IXGBE_READ_REG(hw,
2992 		 * If there are still bits set in the VLVFB registers
3003 		 * been cleared.  This will be indicated by "bits" being
3006 		if (bits) {