io/igb/igb_82575.c

96 	s32 ret_val = E1000_SUCCESS;
132 	ret_val = e1000_get_phy_id_82575(hw);
162 		ret_val = -E1000_ERR_PHY;
167 	return (ret_val);
424 	s32 ret_val = -E1000_ERR_PARAM;
433 	ret_val = hw->phy.ops.acquire(hw);
434 	if (ret_val)
437 	ret_val = e1000_read_phy_reg_i2c(hw, offset, data);
442 	return (ret_val);
457 	s32 ret_val = -E1000_ERR_PARAM;
466 	ret_val = hw->phy.ops.acquire(hw);
467 	if (ret_val)
470 	ret_val = e1000_write_phy_reg_i2c(hw, offset, data);
475 	return (ret_val);
489 	s32 ret_val = E1000_SUCCESS;
504 		ret_val = e1000_get_phy_id(hw);
520 		ret_val = e1000_read_phy_reg_sgmii_82575(hw, PHY_ID1, &phy_id);
521 		if (ret_val == E1000_SUCCESS) {
540 		ret_val = -E1000_ERR_PHY;
542 		ret_val = e1000_get_phy_id(hw);
549 	return (ret_val);
561 	s32 ret_val = E1000_SUCCESS;
579 	ret_val = hw->phy.ops.write_reg(hw, 0x1B, 0x8084);
580 	if (ret_val)
583 	ret_val = hw->phy.ops.commit(hw);
586 	return (ret_val);
606 	s32 ret_val = E1000_SUCCESS;
614 	ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);
615 	if (ret_val)
620 		ret_val = phy->ops.write_reg(hw,
623 		if (ret_val)
627 		ret_val = phy->ops.read_reg(hw,
631 		ret_val = phy->ops.write_reg(hw,
634 		if (ret_val)
638 		ret_val = phy->ops.write_reg(hw,
648 			ret_val = phy->ops.read_reg(hw,
651 			if (ret_val)
655 			ret_val = phy->ops.write_reg(hw,
658 			if (ret_val)
661 			ret_val = phy->ops.read_reg(hw,
664 			if (ret_val)
668 			ret_val = phy->ops.write_reg(hw,
671 			if (ret_val)
677 	return (ret_val);
692 	s32 ret_val;
696 	ret_val = e1000_acquire_swfw_sync_82575(hw, E1000_SWFW_EEP_SM);
697 	if (ret_val)
700 	ret_val = e1000_acquire_nvm_generic(hw);
702 	if (ret_val)
706 	return (ret_val);
739 	s32 ret_val = E1000_SUCCESS;
746 			ret_val = -E1000_ERR_SWFW_SYNC;
765 		ret_val = -E1000_ERR_SWFW_SYNC;
775 	return (ret_val);
818 	s32 ret_val = E1000_SUCCESS;
844 	return (ret_val);
860 	s32 ret_val;
865 		ret_val = e1000_get_pcs_speed_and_duplex_82575(hw, speed,
868 		ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed,
871 	return (ret_val);
884 	s32 ret_val;
891 		ret_val = e1000_get_pcs_speed_and_duplex_82575(hw, &speed,
900 		ret_val = e1000_check_for_copper_link_generic(hw);
903 	return (ret_val);
1022 	s32 ret_val;
1030 	ret_val = e1000_disable_pcie_master_generic(hw);
1031 	if (ret_val) {
1036 	ret_val = e1000_set_pcie_completion_timeout(hw);
1037 	if (ret_val) {
1055 	ret_val = e1000_get_auto_rd_done_generic(hw);
1056 	if (ret_val) {
1074 	ret_val = e1000_check_alt_mac_addr_generic(hw);
1076 	return (ret_val);
1089 	s32 ret_val;
1095 	ret_val = mac->ops.id_led_init(hw);
1096 	if (ret_val) {
1118 	ret_val = mac->ops.setup_link(hw);
1128 	return (ret_val);
1143 	s32 ret_val;
1152 	ret_val = e1000_setup_serdes_link_82575(hw);
1153 	if (ret_val)
1160 		ret_val = hw->phy.ops.reset(hw);
1161 		if (ret_val) {
1168 		ret_val = e1000_copper_link_setup_m88(hw);
1171 		ret_val = e1000_copper_link_setup_igp(hw);
1174 		ret_val = e1000_copper_link_setup_82577(hw);
1177 		ret_val = -E1000_ERR_PHY;
1181 	if (ret_val)
1184 	ret_val = e1000_setup_copper_link_generic(hw);
1186 	return (ret_val);
1313 	s32 ret_val;
1317 	ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
1318 	if (ret_val) {
1335 	return (ret_val);
1412 	s32 ret_val = E1000_SUCCESS;
1421 	ret_val = e1000_check_alt_mac_addr_generic(hw);
1422 	if (ret_val)
1425 	ret_val = e1000_read_mac_addr_generic(hw);
1428 	return (ret_val);
1609 	s32 ret_val = E1000_SUCCESS;
1630 	ret_val = e1000_read_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,
1632 	if (ret_val)
1637 	ret_val = e1000_write_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,
1644 	return (ret_val);
1700 	s32 ret_val;
1704 	ret_val = hw->phy.ops.acquire(hw);
1705 	if (ret_val)
1717 	ret_val = e1000_read_phy_reg_mdic(hw, offset, data);
1722 	return (ret_val);
1737 	s32 ret_val;
1741 	ret_val = hw->phy.ops.acquire(hw);
1742 	if (ret_val)
1754 	ret_val = e1000_write_phy_reg_mdic(hw, offset, data);
1759 	return (ret_val);
1772 	s32 ret_val = E1000_SUCCESS;
1789 	ret_val = e1000_disable_pcie_master_generic(hw);
1790 	if (ret_val)
1818 	ret_val = e1000_get_auto_rd_done_generic(hw);
1819 	if (ret_val) {
1840 	ret_val = e1000_check_alt_mac_addr_generic(hw);
1846 	return (ret_val);
1862 	u16 ret_val = 0;
1865 		ret_val = e1000_82580_rxpbs_table[data];
1867 	return (ret_val);