Lines Matching refs:bits
78 * Description: Upper 20 bits [63:44] to use for all accesses over
82 * Page handle, bits [63:44] of all PCI-E transactions for this
97 } bits;
129 * TdcStat ldf1 error bits remain set.
140 * Address bits [43:19] of the start address for the transmit
172 } bits;
207 } bits;
239 } bits;
273 } bits;
350 } bits;
366 * state, clear marked/mMarked bits, repeat. If interrupts are
490 } bits;
497 * Description: Upper bits of Tx DMA mailbox address in host memory.
515 } bits;
522 * Description: Lower bits of Tx DMA mailbox address in host memory.
541 } bits;
565 } bits;
594 } bits;
633 } bits;
685 } bits;
714 } bits;
731 * enable writing of parity bits 1=enabled, 0=disabled
755 } bits;
777 } bits;
801 } bits;
818 * enable writing of ecc bits 1=enabled, 0=disabled
839 } bits;
861 } bits;
885 } bits;
902 * enable writing of par bits 1=enabled, 0=disabled
923 } bits;
945 } bits;
973 } bits;
999 } bits;
1030 } bits;
1056 } bits;
1092 } bits;
1131 } bits;
1139 * regsiter to set bits in TdcFifoErrStat, allowing debug creation of
1171 } bits;
1178 * Description: Write this regsiter to set bits in TdcStat, allowing
1249 } bits;
1273 } bits;
1300 } bits;
1329 } bits;
1358 } bits;
1398 } bits;
1430 } bits;