io/hxge/hpi_rxdma.c

42 hpi_rxdma_cfg_logical_page_handle(hpi_handle_t handle, uint8_t rdc,
47 	if (!RXDMA_CHANNEL_VALID(rdc)) {
50 		    " Illegal RDC number %d \n", rdc));
57 	RXDMA_REG_WRITE64(handle, RDC_PAGE_HANDLE, rdc, page_hdl.value);
63 hpi_rxdma_cfg_rdc_wait_for_qst(hpi_handle_t handle, uint8_t rdc)
69 	RXDMA_REG_READ64(handle, RDC_RX_CFG1, rdc, &cfg.value);
73 		RXDMA_REG_READ64(handle, RDC_RX_CFG1, rdc, &cfg.value);
84 hpi_rxdma_cfg_rdc_ctl(hpi_handle_t handle, uint8_t rdc, uint8_t op)
89 	uint32_t error = HPI_RXDMA_ERROR_ENCODE(HPI_RXDMA_RESET_ERR, rdc);
91 	if (!RXDMA_CHANNEL_VALID(rdc)) {
93 		    "hpi_rxdma_cfg_rdc_ctl Illegal RDC number %d \n", rdc));
99 		RXDMA_REG_READ64(handle, RDC_RX_CFG1, rdc, &cfg.value);
101 		RXDMA_REG_WRITE64(handle, RDC_RX_CFG1, rdc, cfg.value);
104 		RXDMA_REG_READ64(handle, RDC_RX_CFG1, rdc, &cfg.value);
108 			RXDMA_REG_READ64(handle, RDC_RX_CFG1, rdc, &cfg.value);
116 		RXDMA_REG_READ64(handle, RDC_RX_CFG1, rdc, &cfg.value);
118 		RXDMA_REG_WRITE64(handle, RDC_RX_CFG1, rdc, cfg.value);
122 		    rdc) != HPI_SUCCESS) {
126 			    rdc));
134 		RXDMA_REG_WRITE64(handle, RDC_RX_CFG1, rdc, cfg.value);
136 		RXDMA_REG_READ64(handle, RDC_RX_CFG1, rdc, &cfg.value);
140 			RXDMA_REG_READ64(handle, RDC_RX_CFG1, rdc, &cfg.value);
145 			    " Reset Failed for RDC %d \n", rdc));
158 hpi_rxdma_cfg_rdc_enable(hpi_handle_t handle, uint8_t rdc)
160 	return (hpi_rxdma_cfg_rdc_ctl(handle, rdc, RXDMA_OP_ENABLE));
164 hpi_rxdma_cfg_rdc_disable(hpi_handle_t handle, uint8_t rdc)
166 	return (hpi_rxdma_cfg_rdc_ctl(handle, rdc, RXDMA_OP_DISABLE));
170 hpi_rxdma_cfg_rdc_reset(hpi_handle_t handle, uint8_t rdc)
172 	return (hpi_rxdma_cfg_rdc_ctl(handle, rdc, RXDMA_OP_RESET));
176 hpi_rxdma_cfg_rdc_rcr_ctl(hpi_handle_t handle, uint8_t rdc,
181 	if (!RXDMA_CHANNEL_VALID(rdc)) {
183 		    "rxdma_cfg_rdc_rcr_ctl Illegal RDC number %d \n", rdc));
187 	RXDMA_REG_READ64(handle, RDC_RCR_CFG_B, rdc, &rcr_cfgb.value);
206 		return (HPI_RXDMA_OPCODE_INVALID(rdc));
209 	RXDMA_REG_WRITE64(handle, RDC_RCR_CFG_B, rdc, rcr_cfgb.value);
214 hpi_rxdma_cfg_rdc_rcr_threshold(hpi_handle_t handle, uint8_t rdc,
217 	return (hpi_rxdma_cfg_rdc_rcr_ctl(handle, rdc,
222 hpi_rxdma_cfg_rdc_rcr_timeout(hpi_handle_t handle, uint8_t rdc,
225 	return (hpi_rxdma_cfg_rdc_rcr_ctl(handle, rdc,
233 hpi_rxdma_cfg_rdc_ring(hpi_handle_t handle, uint8_t rdc,
244 	if (!RXDMA_CHANNEL_VALID(rdc)) {
246 		    "rxdma_cfg_rdc_ring Illegal RDC number %d \n", rdc));
296 		return (HPI_RXDMA_ERROR_ENCODE(HPI_RXDMA_RBRSZIE_INVALID, rdc));
397 		return (HPI_RXDMA_ERROR_ENCODE(HPI_RXDMA_RCRSZIE_INVALID, rdc));
435 	RXDMA_REG_WRITE64(handle, RDC_RX_CFG1, rdc, cfg1.value);
436 	RXDMA_REG_WRITE64(handle, RDC_RX_CFG2, rdc, cfg2.value);
438 	RXDMA_REG_WRITE64(handle, RDC_RBR_CFG_A, rdc, cfga.value);
439 	RXDMA_REG_WRITE64(handle, RDC_RBR_CFG_B, rdc, cfgb.value);
441 	RXDMA_REG_WRITE64(handle, RDC_RCR_CFG_A, rdc, rcr_cfga.value);
442 	RXDMA_REG_WRITE64(handle, RDC_RCR_CFG_B, rdc, rcr_cfgb.value);
444 	RXDMA_REG_WRITE64(handle, RDC_PAGE_HANDLE, rdc, page_handle.value);
488 hpi_rxdma_rdc_rbr_stat_get(hpi_handle_t handle, uint8_t rdc,
491 	if (!RXDMA_CHANNEL_VALID(rdc)) {
493 		    " rxdma_rdc_rbr_stat_get Illegal RDC Number %d \n", rdc));
497 	RXDMA_REG_READ64(handle, RDC_RBR_QLEN, rdc, &rbr_stat->value);
503 hpi_rxdma_rdc_rcr_qlen_get(hpi_handle_t handle, uint8_t rdc,
508 	if (!RXDMA_CHANNEL_VALID(rdc)) {
510 		    " rxdma_rdc_rcr_qlen_get Illegal RDC Number %d \n", rdc));
514 	RXDMA_REG_READ64(handle, RDC_RCR_QLEN, rdc, &stats.value);
518 	    rdc, *rcr_qlen, stats.bits.qlen));