Lines Matching defs:phy_ctrl
4745 uint16_t phy_ctrl;
4777 (void) e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
4782 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4787 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4789 PHY_1000T_CTRL, phy_ctrl);
4798 !e1000_read_phy_reg(hw, PHY_CONTROL, &phy_ctrl)) {
4799 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4802 PHY_CONTROL, phy_ctrl);
4823 (void) e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
4824 phy_ctrl |= CR_1000T_MS_ENABLE;
4825 (void) e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4831 !e1000_read_phy_reg(hw, PHY_CONTROL, &phy_ctrl)) {
4832 phy_ctrl |=
4834 (void) e1000_write_phy_reg(hw, PHY_CONTROL, phy_ctrl);
5366 uint16_t phy_ctrl;
5375 (void) e1000_read_phy_reg(hw, PHY_CONTROL, &phy_ctrl);
5376 phy_ctrl &= ~(MII_CR_AUTO_NEG_EN | MII_CR_SPEED_100 | MII_CR_SPEED_10);
5377 phy_ctrl |= MII_CR_FULL_DUPLEX | MII_CR_SPEED_1000;
5390 phy_ctrl | MII_CR_RESET | MII_CR_AUTO_NEG_EN);
5393 phy_ctrl | MII_CR_RESET);
5447 (void) e1000_write_phy_reg(hw, PHY_CONTROL, phy_ctrl | MII_CR_LOOPBACK);
5643 uint16_t phy_ctrl;
5650 phy_ctrl = (MII_CR_FULL_DUPLEX |
5655 phy_ctrl | MII_CR_RESET); /* 0xA100 */
5660 phy_ctrl); /* 0x2100 */
5680 uint16_t phy_ctrl;
5687 phy_ctrl = (MII_CR_FULL_DUPLEX |
5692 phy_ctrl | MII_CR_RESET); /* 0x8100 */
5697 phy_ctrl); /* 0x0100 */
6077 (void) e1000_read_phy_reg(hw, PHY_CONTROL, &Adapter->phy_ctrl);