Lines Matching refs:ret_val
175 s32 ret_val = E1000_SUCCESS;
185 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
186 if (ret_val)
191 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);
192 if (ret_val)
207 ret_val = phy->ops.acquire(hw);
208 if (ret_val)
210 ret_val = e1000_set_mdio_slow_mode_hv(hw, true);
211 if (ret_val)
220 ret_val = phy->ops.acquire(hw);
221 if (ret_val)
222 return (ret_val);
223 ret_val = e1000_set_mdio_slow_mode_hv(hw, false);
227 return (ret_val);
239 s32 ret_val = E1000_SUCCESS;
246 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xC1);
247 if (ret_val)
250 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0);
253 return (ret_val);
270 s32 ret_val = E1000_SUCCESS;
298 ret_val = -E1000_ERR_PHY;
303 ret_val = -E1000_ERR_PHY;
309 return (ret_val);
325 s32 ret_val = E1000_SUCCESS;
354 ret_val = -E1000_ERR_PHY;
359 ret_val = -E1000_ERR_PHY;
364 return (ret_val);
380 s32 ret_val = E1000_SUCCESS;
387 ret_val = hw->phy.ops.acquire(hw);
388 if (ret_val)
391 ret_val = e1000_read_phy_reg_mdic(hw,
398 return (ret_val);
413 s32 ret_val = E1000_SUCCESS;
420 ret_val = hw->phy.ops.acquire(hw);
421 if (ret_val)
424 ret_val = e1000_write_phy_reg_mdic(hw,
431 return (ret_val);
449 s32 ret_val = E1000_SUCCESS;
457 ret_val = hw->phy.ops.acquire(hw);
458 if (ret_val)
463 ret_val = e1000_write_phy_reg_mdic(hw,
465 if (ret_val)
469 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
476 return (ret_val);
524 s32 ret_val = E1000_SUCCESS;
532 ret_val = hw->phy.ops.acquire(hw);
533 if (ret_val)
538 ret_val = e1000_write_phy_reg_mdic(hw,
540 if (ret_val)
544 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
552 return (ret_val);
600 s32 ret_val = E1000_SUCCESS;
608 ret_val = hw->phy.ops.acquire(hw);
609 if (ret_val)
626 return (ret_val);
676 s32 ret_val = E1000_SUCCESS;
684 ret_val = hw->phy.ops.acquire(hw);
685 if (ret_val)
699 return (ret_val);
742 s32 ret_val;
748 ret_val = E1000_SUCCESS;
753 ret_val = phy->ops.read_reg(hw, I82577_CFG_REG, &phy_data);
754 if (ret_val)
762 ret_val = phy->ops.write_reg(hw, I82577_CFG_REG, phy_data);
763 if (ret_val)
767 ret_val = phy->ops.read_reg(hw, I82577_CTRL_REG, &phy_data);
768 if (ret_val)
771 ret_val = phy->ops.write_reg(hw, I82577_CTRL_REG, phy_data);
774 return (ret_val);
788 s32 ret_val;
794 ret_val = E1000_SUCCESS;
799 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
800 if (ret_val)
848 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
849 if (ret_val)
859 ret_val = phy->ops.read_reg(hw,
862 if (ret_val)
879 ret_val = phy->ops.write_reg(hw,
882 if (ret_val)
888 ret_val = phy->ops.write_reg(hw, 29, 0x0003);
889 if (ret_val)
893 ret_val = phy->ops.write_reg(hw, 30, 0x0000);
894 if (ret_val)
899 ret_val = phy->ops.commit(hw);
900 if (ret_val) {
906 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
908 if (ret_val)
914 ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
916 if (ret_val)
921 return (ret_val);
935 s32 ret_val;
941 ret_val = E1000_SUCCESS;
945 ret_val = hw->phy.ops.reset(hw);
946 if (ret_val) {
962 ret_val = hw->phy.ops.set_d3_lplu_state(hw, false);
963 if (ret_val) {
971 ret_val = hw->phy.ops.set_d0_lplu_state(hw, false);
972 if (ret_val) {
978 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &data);
979 if (ret_val)
996 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, data);
997 if (ret_val)
1009 ret_val = phy->ops.read_reg(hw,
1012 if (ret_val)
1016 ret_val = phy->ops.write_reg(hw,
1019 if (ret_val)
1023 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data);
1024 if (ret_val)
1028 ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, data);
1029 if (ret_val)
1033 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data);
1034 if (ret_val)
1057 ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, data);
1058 if (ret_val)
1063 return (ret_val);
1079 s32 ret_val;
1098 ret_val = e1000_phy_setup_autoneg(hw);
1099 if (ret_val) {
1109 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
1110 if (ret_val)
1114 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
1115 if (ret_val)
1123 ret_val = hw->mac.ops.wait_autoneg(hw);
1124 if (ret_val) {
1134 return (ret_val);
1150 s32 ret_val;
1159 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);
1160 if (ret_val)
1165 ret_val = phy->ops.read_reg(hw,
1168 if (ret_val)
1284 ret_val = -E1000_ERR_CONFIG;
1288 ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);
1289 if (ret_val)
1295 ret_val = phy->ops.write_reg(hw,
1298 if (ret_val)
1303 return (ret_val);
1318 s32 ret_val;
1328 ret_val = e1000_copper_link_autoneg(hw);
1329 if (ret_val)
1337 ret_val = hw->phy.ops.force_speed_duplex(hw);
1338 if (ret_val) {
1348 ret_val = e1000_phy_has_link_generic(hw,
1352 if (ret_val)
1358 ret_val = e1000_config_fc_after_link_up_generic(hw);
1365 return (ret_val);
1380 s32 ret_val;
1386 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
1387 if (ret_val)
1392 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
1393 if (ret_val)
1400 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data);
1401 if (ret_val)
1407 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data);
1408 if (ret_val)
1418 ret_val = e1000_phy_has_link_generic(hw,
1422 if (ret_val)
1431 ret_val = e1000_phy_has_link_generic(hw,
1435 if (ret_val)
1440 return (ret_val);
1457 s32 ret_val;
1467 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1468 if (ret_val)
1472 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
1473 if (ret_val)
1478 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
1479 if (ret_val)
1484 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
1485 if (ret_val)
1489 ret_val = hw->phy.ops.commit(hw);
1490 if (ret_val)
1496 ret_val = e1000_phy_has_link_generic(hw,
1500 if (ret_val)
1508 ret_val = phy->ops.write_reg(hw,
1511 if (ret_val)
1513 ret_val = e1000_phy_reset_dsp_generic(hw);
1514 if (ret_val)
1518 ret_val = e1000_phy_has_link_generic(hw,
1522 if (ret_val)
1525 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data);
1526 if (ret_val)
1535 ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_data);
1536 if (ret_val)
1543 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1544 if (ret_val)
1548 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
1551 return (ret_val);
1566 s32 ret_val;
1573 ret_val = e1000_phy_force_speed_duplex_igp(hw);
1577 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &data);
1578 if (ret_val)
1583 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, data);
1584 if (ret_val)
1588 ret_val = phy->ops.read_reg(hw, IFE_PHY_MDIX_CONTROL, &data);
1589 if (ret_val)
1595 ret_val = phy->ops.write_reg(hw, IFE_PHY_MDIX_CONTROL, data);
1596 if (ret_val)
1606 ret_val = e1000_phy_has_link_generic(hw,
1608 if (ret_val)
1617 ret_val = e1000_phy_has_link_generic(hw,
1619 if (ret_val)
1624 return (ret_val);
1709 s32 ret_val = E1000_SUCCESS;
1717 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);
1718 if (ret_val)
1723 ret_val = phy->ops.write_reg(hw,
1726 if (ret_val)
1735 ret_val = phy->ops.read_reg(hw,
1738 if (ret_val)
1742 ret_val = phy->ops.write_reg(hw,
1745 if (ret_val)
1748 ret_val = phy->ops.read_reg(hw,
1751 if (ret_val)
1755 ret_val = phy->ops.write_reg(hw,
1758 if (ret_val)
1765 ret_val = phy->ops.write_reg(hw,
1768 if (ret_val)
1772 ret_val = phy->ops.read_reg(hw,
1775 if (ret_val)
1779 ret_val = phy->ops.write_reg(hw,
1785 return (ret_val);
1800 s32 ret_val;
1822 ret_val = E1000_SUCCESS;
1826 ret_val = phy->ops.read_reg(hw, offset, &phy_data);
1828 if (!ret_val)
1832 return (ret_val);
1847 s32 ret_val;
1852 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &data);
1854 if (!ret_val)
1859 return (ret_val);
1875 s32 ret_val;
1883 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data);
1884 if (ret_val)
1900 ret_val = phy->ops.read_reg(hw, offset, &data);
1902 if (!ret_val)
1908 return (ret_val);
1921 s32 ret_val;
1937 ret_val = phy->ops.read_reg(hw, offset, &phy_data);
1939 if (!ret_val)
1943 return (ret_val);
1956 s32 ret_val = E1000_SUCCESS;
1966 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
1967 if (ret_val)
1969 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
1970 if (ret_val)
1981 return (ret_val);
1997 s32 ret_val = E1000_SUCCESS;
2011 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
2012 if (ret_val) {
2020 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
2021 if (ret_val)
2033 return (ret_val);
2055 s32 ret_val;
2060 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
2061 if (ret_val)
2068 ret_val = E1000_ERR_PHY;
2077 return (ret_val);
2095 s32 ret_val = E1000_SUCCESS;
2109 ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &phy_data);
2110 if (ret_val)
2125 ret_val = -E1000_ERR_PHY;
2152 return (ret_val);
2169 s32 ret_val;
2177 ret_val = -E1000_ERR_CONFIG;
2181 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
2182 if (ret_val)
2187 ret_val = -E1000_ERR_CONFIG;
2191 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
2192 if (ret_val)
2199 ret_val = e1000_check_polarity_m88(hw);
2200 if (ret_val)
2203 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
2204 if (ret_val)
2210 ret_val = hw->phy.ops.get_cable_length(hw);
2211 if (ret_val)
2214 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);
2215 if (ret_val)
2233 return (ret_val);
2249 s32 ret_val;
2255 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
2256 if (ret_val)
2261 ret_val = -E1000_ERR_CONFIG;
2267 ret_val = e1000_check_polarity_igp(hw);
2268 if (ret_val)
2271 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data);
2272 if (ret_val)
2279 ret_val = hw->phy.ops.get_cable_length(hw);
2280 if (ret_val)
2283 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data);
2284 if (ret_val)
2301 return (ret_val);
2314 s32 ret_val = E1000_SUCCESS;
2322 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
2323 if (ret_val)
2327 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
2328 if (ret_val)
2334 return (ret_val);
2350 s32 ret_val = E1000_SUCCESS;
2355 ret_val = phy->ops.check_reset_block(hw);
2356 if (ret_val) {
2357 ret_val = E1000_SUCCESS;
2361 ret_val = phy->ops.acquire(hw);
2362 if (ret_val)
2378 ret_val = phy->ops.get_cfg_done(hw);
2381 return (ret_val);
2548 s32 ret_val = -E1000_ERR_PHY_TYPE;
2568 ret_val = E1000_SUCCESS;
2577 return (ret_val);
2609 s32 ret_val;
2616 ret_val = hw->phy.ops.acquire(hw);
2617 if (ret_val)
2622 ret_val = e1000_access_phy_wakeup_reg_bm(hw,
2644 ret_val = e1000_write_phy_reg_mdic(hw, page_select,
2646 if (ret_val)
2650 ret_val = e1000_write_phy_reg_mdic(hw,
2656 return (ret_val);
2672 s32 ret_val;
2679 ret_val = hw->phy.ops.acquire(hw);
2680 if (ret_val)
2685 ret_val = e1000_access_phy_wakeup_reg_bm(hw,
2707 ret_val = e1000_write_phy_reg_mdic(hw, page_select,
2709 if (ret_val)
2713 ret_val = e1000_read_phy_reg_mdic(hw,
2719 return (ret_val);
2735 s32 ret_val;
2740 ret_val = hw->phy.ops.acquire(hw);
2741 if (ret_val)
2746 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
2756 ret_val = e1000_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
2759 if (ret_val)
2763 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2768 return (ret_val);
2783 s32 ret_val;
2788 ret_val = hw->phy.ops.acquire(hw);
2789 if (ret_val)
2794 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
2803 ret_val = e1000_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
2806 if (ret_val)
2810 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2815 return (ret_val);
2841 s32 ret_val;
2862 ret_val = e1000_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
2863 if (ret_val) {
2870 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
2871 if (ret_val) {
2877 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG,
2879 if (ret_val) {
2885 ret_val = e1000_write_phy_reg_mdic(hw,
2890 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ADDRESS_OPCODE, reg);
2891 if (ret_val) {
2898 ret_val = e1000_read_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
2902 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
2906 if (ret_val) {
2918 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
2919 if (ret_val) {
2925 return (ret_val);
2977 s32 ret_val = E1000_SUCCESS;
2982 ret_val = e1000_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
2984 if (ret_val)
2987 ret_val = e1000_write_phy_reg_mdic(hw, BM_CS_CTRL1,
2990 if (ret_val)
2995 ret_val = e1000_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data);
2998 return (ret_val);
3016 s32 ret_val;
3024 ret_val = hw->phy.ops.acquire(hw);
3025 if (ret_val)
3026 return (ret_val);
3032 ret_val = e1000_set_mdio_slow_mode_hv(hw, true);
3033 if (ret_val)
3041 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset,
3047 ret_val = e1000_access_phy_debug_regs_hv(hw, offset,
3063 ret_val = e1000_write_phy_reg_mdic(hw,
3068 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, data);
3072 ret_val = e1000_set_mdio_slow_mode_hv(hw, false);
3077 return (ret_val);
3125 s32 ret_val;
3134 ret_val = hw->phy.ops.acquire(hw);
3135 if (ret_val)
3136 return (ret_val);
3142 ret_val = e1000_set_mdio_slow_mode_hv(hw, true);
3143 if (ret_val)
3151 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset,
3157 ret_val = e1000_access_phy_debug_regs_hv(hw, offset,
3179 ret_val = e1000_access_phy_debug_regs_hv(hw, (1 << 6) | 0x3,
3181 if (ret_val)
3191 ret_val = e1000_write_phy_reg_mdic(hw,
3196 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
3202 ret_val = e1000_set_mdio_slow_mode_hv(hw, false);
3207 return (ret_val);
3270 s32 ret_val;
3285 ret_val = e1000_write_phy_reg_mdic(hw, addr_reg, (u16)offset & 0x3F);
3286 if (ret_val) {
3293 ret_val = e1000_read_phy_reg_mdic(hw, data_reg, data);
3295 ret_val = e1000_write_phy_reg_mdic(hw, data_reg, *data);
3297 if (ret_val) {
3303 return (ret_val);
3320 s32 ret_val = E1000_SUCCESS;
3334 ret_val = hw->phy.ops.read_reg(hw, BM_CS_STATUS, &data);
3335 if (ret_val)
3350 ret_val = hw->phy.ops.write_reg(hw, HV_MUX_DATA_CTRL,
3352 if (ret_val)
3355 ret_val = hw->phy.ops.write_reg(hw, HV_MUX_DATA_CTRL,
3359 return (ret_val);
3374 s32 ret_val;
3379 ret_val = phy->ops.read_reg(hw, I82577_PHY_STATUS_2, &data);
3381 if (!ret_val)
3386 return (ret_val);
3401 s32 ret_val;
3407 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
3408 if (ret_val)
3413 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
3414 if (ret_val)
3421 ret_val = phy->ops.read_reg(hw, I82577_PHY_CTRL_2, &phy_data);
3422 if (ret_val)
3428 ret_val = phy->ops.write_reg(hw, I82577_PHY_CTRL_2, phy_data);
3429 if (ret_val)
3439 ret_val = e1000_phy_has_link_generic(hw,
3441 if (ret_val)
3450 ret_val = e1000_phy_has_link_generic(hw,
3452 if (ret_val)
3457 return (ret_val);
3473 s32 ret_val;
3479 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
3480 if (ret_val)
3485 ret_val = -E1000_ERR_CONFIG;
3491 ret_val = e1000_check_polarity_82577(hw);
3492 if (ret_val)
3495 ret_val = phy->ops.read_reg(hw, I82577_PHY_STATUS_2, &data);
3496 if (ret_val)
3503 ret_val = hw->phy.ops.get_cable_length(hw);
3504 if (ret_val)
3507 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data);
3508 if (ret_val)
3523 return (ret_val);
3537 s32 ret_val;
3542 ret_val = phy->ops.read_reg(hw, I82577_PHY_DIAG_STATUS, &phy_data);
3543 if (ret_val)
3550 ret_val = E1000_ERR_PHY;
3555 return (ret_val);