Lines Matching refs:phy

89 	struct e1000_phy_info *phy = &hw->phy;
94 if (hw->phy.media_type != e1000_media_type_copper) {
95 phy->type = e1000_phy_none;
99 phy->addr = 1;
100 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
101 phy->reset_delay_us = 100;
103 phy->ops.acquire = e1000_get_hw_semaphore_82571;
104 phy->ops.check_polarity = e1000_check_polarity_igp;
105 phy->ops.check_reset_block = e1000_check_reset_block_generic;
106 phy->ops.release = e1000_put_hw_semaphore_82571;
107 phy->ops.reset = e1000_phy_hw_reset_generic;
108 phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82571;
109 phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
110 phy->ops.power_up = e1000_power_up_phy_copper;
111 phy->ops.power_down = e1000_power_down_phy_copper_82571;
116 phy->type = e1000_phy_igp_2;
117 phy->ops.get_cfg_done = e1000_get_cfg_done_82571;
118 phy->ops.get_info = e1000_get_phy_info_igp;
119 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp;
120 phy->ops.get_cable_length = e1000_get_cable_length_igp_2;
121 phy->ops.read_reg = e1000_read_phy_reg_igp;
122 phy->ops.write_reg = e1000_write_phy_reg_igp;
128 if (phy->id != IGP01E1000_I_PHY_ID) {
134 phy->type = e1000_phy_m88;
135 phy->ops.get_cfg_done = e1000_get_cfg_done_generic;
136 phy->ops.get_info = e1000_get_phy_info_m88;
137 phy->ops.commit = e1000_phy_sw_reset_generic;
138 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
139 phy->ops.get_cable_length = e1000_get_cable_length_m88;
140 phy->ops.read_reg = e1000_read_phy_reg_m88;
141 phy->ops.write_reg = e1000_write_phy_reg_m88;
147 if (phy->id != M88E1111_I_PHY_ID) {
149 DEBUGOUT1("PHY ID unknown: type = 0x%08x\n", phy->id);
155 phy->type = e1000_phy_bm;
156 phy->ops.get_cfg_done = e1000_get_cfg_done_generic;
157 phy->ops.get_info = e1000_get_phy_info_m88;
158 phy->ops.commit = e1000_phy_sw_reset_generic;
159 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
160 phy->ops.get_cable_length = e1000_get_cable_length_m88;
161 phy->ops.read_reg = e1000_read_phy_reg_bm2;
162 phy->ops.write_reg = e1000_write_phy_reg_bm2;
167 if (phy->id != BME1000_E_PHY_ID_R2) {
169 DEBUGOUT1("PHY ID unknown: type = 0x%08x\n", phy->id);
277 hw->phy.media_type = e1000_media_type_fiber;
283 hw->phy.media_type = e1000_media_type_internal_serdes;
286 hw->phy.media_type = e1000_media_type_copper;
323 (hw->phy.media_type == e1000_media_type_copper)
327 switch (hw->phy.media_type) {
384 (hw->phy.media_type == e1000_media_type_copper)
451 hw->phy.ops.init_params = e1000_init_phy_params_82571;
464 struct e1000_phy_info *phy = &hw->phy;
478 phy->id = IGP01E1000_I_PHY_ID;
485 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
489 phy->id = (u32)(phy_id << 16);
491 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);
495 phy->id |= (u32)(phy_id);
496 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);
870 struct e1000_phy_info *phy = &hw->phy;
876 if (!(phy->ops.read_reg))
879 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);
885 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
891 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
894 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
900 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
908 if (phy->smart_speed == e1000_smart_speed_on) {
909 ret_val = phy->ops.read_reg(hw,
916 ret_val = phy->ops.write_reg(hw,
921 } else if (phy->smart_speed == e1000_smart_speed_off) {
922 ret_val = phy->ops.read_reg(hw,
929 ret_val = phy->ops.write_reg(hw,
1048 if (hw->phy.media_type == e1000_media_type_internal_serdes)
1416 switch (hw->phy.type) {
1799 struct e1000_phy_info *phy = &hw->phy;
1802 if (!(phy->ops.check_reset_block))
1806 if (!(mac->ops.check_mng_mode(hw) || phy->ops.check_reset_block(hw)))