Lines Matching refs:ret_val

82 	s32 ret_val = E1000_SUCCESS;
122 ret_val = phy->ops.reset(hw);
123 if (ret_val) {
130 ret_val = e1000_get_phy_id(hw);
131 if (ret_val)
138 ret_val = -E1000_ERR_PHY;
144 ret_val = -E1000_ERR_PHY;
149 ret_val = -E1000_ERR_PHY;
154 return (ret_val);
386 bool ret_val;
391 ret_val = false;
395 ret_val = dev_spec->init_phy_disabled;
398 return (ret_val);
489 s32 ret_val = E1000_SUCCESS;
495 ret_val = -E1000_ERR_PARAM;
531 return (ret_val);
546 s32 ret_val = E1000_SUCCESS;
552 ret_val = -E1000_ERR_PARAM;
579 return (ret_val);
748 s32 ret_val;
752 ret_val = e1000_phy_force_speed_duplex_m88(hw);
753 if (ret_val)
758 ret_val = e1000_polarity_reversal_workaround_82543(hw);
761 return (ret_val);
775 s32 ret_val = E1000_SUCCESS;
787 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
788 if (ret_val)
790 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF);
791 if (ret_val)
794 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
795 if (ret_val)
808 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
809 if (ret_val)
812 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
813 if (ret_val)
826 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
827 if (ret_val)
830 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
831 if (ret_val)
834 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
835 if (ret_val)
838 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
839 if (ret_val)
842 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
843 if (ret_val)
850 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_TIME, 100000, &link);
851 if (ret_val)
855 return (ret_val);
871 s32 ret_val;
897 ret_val = hw->phy.ops.get_cfg_done(hw);
899 return (ret_val);
912 s32 ret_val = E1000_SUCCESS;
955 return (ret_val);
970 s32 ret_val;
1002 ret_val = mac->ops.setup_link(hw);
1012 return (ret_val);
1032 s32 ret_val;
1045 ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data);
1046 if (ret_val) {
1048 ret_val = -E1000_ERR_NVM;
1056 ret_val = e1000_setup_link_generic(hw);
1059 return (ret_val);
1074 s32 ret_val;
1089 ret_val = hw->phy.ops.reset(hw);
1090 if (ret_val)
1099 ret_val = e1000_copper_link_setup_m88(hw);
1100 if (ret_val)
1108 ret_val = e1000_copper_link_autoneg(hw);
1109 if (ret_val)
1117 ret_val = e1000_phy_force_speed_duplex_82543(hw);
1118 if (ret_val) {
1128 ret_val = e1000_phy_has_link_generic(hw,
1132 if (ret_val)
1142 ret_val = e1000_config_mac_to_phy_82543(hw);
1143 if (ret_val)
1146 ret_val = e1000_config_fc_after_link_up_generic(hw);
1153 return (ret_val);
1167 s32 ret_val;
1178 ret_val = e1000_commit_fc_settings_generic(hw);
1179 if (ret_val)
1194 ret_val = e1000_poll_fiber_serdes_link_generic(hw);
1201 return (ret_val);
1220 s32 ret_val;
1227 ret_val = E1000_SUCCESS;
1231 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
1232 if (ret_val)
1257 ret_val = e1000_polarity_reversal_workaround_82543(hw);
1263 ret_val = -E1000_ERR_CONFIG;
1279 ret_val = e1000_config_mac_to_phy_82543(hw);
1280 if (ret_val) {
1292 ret_val = e1000_config_fc_after_link_up_generic(hw);
1293 if (ret_val) {
1307 ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
1308 if (ret_val) {
1310 return (ret_val);
1344 return (ret_val);
1359 s32 ret_val = E1000_SUCCESS;
1381 ret_val = 0;
1395 ret_val = e1000_config_fc_after_link_up_generic(hw);
1396 if (ret_val) {
1415 return (ret_val);
1429 s32 ret_val = E1000_SUCCESS;
1446 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1447 if (ret_val)
1468 return (ret_val);