io/bge/bge_chip2.c

173 static void bge_cfg_clr16(bge_t *bgep, bge_regno_t regno, uint16_t bits);
177 bge_cfg_clr16(bge_t *bgep, bge_regno_t regno, uint16_t bits)
182 	    (void *)bgep, regno, bits));
187 	    (void *)bgep, regno, bits, regval, regval & ~bits));
189 	regval &= ~bits;
195 static void bge_cfg_clr32(bge_t *bgep, bge_regno_t regno, uint32_t bits);
199 bge_cfg_clr32(bge_t *bgep, bge_regno_t regno, uint32_t bits)
204 	    (void *)bgep, regno, bits));
209 	    (void *)bgep, regno, bits, regval, regval & ~bits));
211 	regval &= ~bits;
468 	 * Note that all other bits are taken from the original value saved
472 	 * of the parity-error and system-error enable bits across multiple
506 	 * Clear any remaining error status bits
587 void bge_reg_set32(bge_t *bgep, bge_regno_t regno, uint32_t bits);
591 bge_reg_set32(bge_t *bgep, bge_regno_t regno, uint32_t bits)
596 	    (void *)bgep, regno, bits));
599 	regval |= bits;
603 void bge_reg_clr32(bge_t *bgep, bge_regno_t regno, uint32_t bits);
607 bge_reg_clr32(bge_t *bgep, bge_regno_t regno, uint32_t bits)
612 	    (void *)bgep, regno, bits));
615 	regval &= ~bits;
738 	 * Mailbox registers are nominally 64 bits on the 5701, but
739 	 * the MSW isn't used.  On the 5703, they're only 32 bits
740 	 * anyway.  So here we just write the lower(!) 32 bits -
1091  * to fiddle with the individual bits.
1255  * doesn't have to fiddle with the individual bits.
1382  * fiddle with the individual bits.
2575  * machines) have a <reset> and <enable> bits (fortunately, in the
2793 		 * have to set and then clear all the bits
2843 		 * have to set and then clear all the bits
2966 	void (*opfn)(bge_t *bgep, bge_regno_t reg, uint32_t bits);
3760 	 * into bits 7-1.  Don't set bit 0, 'cos that's the RESET bit
4181 	 * MSI bits:The least significant MSI 16-bit word.
4237  * Sync the status block, then atomically clear the specified bits in
4240  * <tag> and the <flags> before the bits were cleared.
4242 static int bge_status_sync(bge_t *bgep, uint64_t bits, uint64_t *flags);
4246 bge_status_sync(bge_t *bgep, uint64_t bits, uint64_t *flags)
4252 	    (void *)bgep, bits));
4262 	*flags = bge_atomic_clr64(&bsp->flags_n_tag, bits);
4265 	    (void *)bgep, bits, *flags));
4599 	 * Get & clear the writable status bits in the Tx status register
4600 	 * (some bits are write-1-to-clear, others are just readonly).
4606 	 * Get & clear the ERROR and LINK_CHANGED bits from the status block
5412 		 * NB: we use the high-order bits of the 'address' as