Lines Matching defs:lap

79 static fpcfga_ret_t do_stat_fca_xport(fpcfga_list_t *lap, int limited_stat,
84 fpcfga_list_t *lap, int limited_stat);
86 fpcfga_list_t *lap, int limited_stat);
92 uchar_t inq_type, fpcfga_list_t *lap);
102 int *l_errnop, fpcfga_list_t *lap);
109 static int stat_path_info_fc_dev(di_node_t root, fpcfga_list_t *lap,
111 static int stat_path_info_FCP_dev(di_node_t root, fpcfga_list_t *lap,
114 fpcfga_list_t *lap, int *l_errnop);
1063 fpcfga_list_t *lap,
1072 if ((ret = get_report_lun_data(lap->apidp->xport_phys, dyncomp,
1090 dyncomp, num_luns, resp_buf, lap, l_errnop);
1189 fpcfga_list_t *lap = NULL;
1199 lap = (fpcfga_list_t *)arg;
1214 * if (!known_state(node) && (lap->cmd != FPCFGA_STAT_FC_DEV)) {
1229 lap->l_errno = errno;
1230 lap->ret = FPCFGA_LIB_ERR;
1239 if (!dev_cmp(lap->apidp->xport_phys, nodepath, match_minor)) {
1245 if (lap->cmd == FPCFGA_STAT_FC_DEV) {
1260 lap->ret = FPCFGA_LIB_ERR;
1270 if (strncmp(port_wwn, lap->apidp->dyncomp,
1285 if (lap->cmd == FPCFGA_STAT_FCA_PORT) {
1294 ret = do_stat_fc_dev(node, nodepath, lap, limited_stat);
1296 if (lap->cmd == FPCFGA_STAT_FC_DEV) {
1297 lap->ret = ret;
1307 if (lap->cmd == FPCFGA_STAT_FCA_PORT &&
1308 lap->chld_config == CFGA_STAT_CONFIGURED) {
1310 } else if (lap->cmd == FPCFGA_STAT_FC_DEV) {
1338 fpcfga_list_t *lap = NULL;
1346 lap = (fpcfga_list_t *)arg;
1358 lap->l_errno = errno;
1359 lap->ret = FPCFGA_LIB_ERR;
1368 if (!dev_cmp(lap->apidp->xport_phys, nodepath, match_minor)) {
1374 if (lap->cmd == FPCFGA_STAT_FC_DEV) {
1388 if (strncmp(port_wwn, lap->apidp->dyncomp,
1400 if (lap->cmd == FPCFGA_STAT_FCA_PORT) {
1409 ret = do_stat_FCP_dev(node, nodepath, lap, limited_stat);
1417 if (lap->cmd == FPCFGA_STAT_FCA_PORT &&
1418 lap->chld_config == CFGA_STAT_CONFIGURED) {
1430 do_stat_fca_xport(fpcfga_list_t *lap, int limited_stat,
1441 assert(lap->xport_logp != NULL);
1444 if (lap->apidp->flags == FLAG_DEVINFO_FORCE) {
1452 ret = walk_tree(lap->apidp->xport_phys, &devinfo_state,
1455 lap->xport_rstate = xport_devinfo_to_recep_state(devinfo_state);
1457 lap->xport_rstate = CFGA_STAT_NONE;
1468 (void) snprintf(lap->xport_type,
1469 sizeof (lap->xport_type), "%s",
1473 (void) snprintf(lap->xport_type,
1474 sizeof (lap->xport_type), "%s",
1478 (void) snprintf(lap->xport_type,
1479 sizeof (lap->xport_type), "%s",
1483 (void) snprintf(lap->xport_type,
1484 sizeof (lap->xport_type), "%s",
1491 (void) snprintf(lap->xport_type,
1492 sizeof (lap->xport_type), "%s",
1497 (void) snprintf(lap->xport_type,
1498 sizeof (lap->xport_type), "%s",
1511 lap->l_errno = errno;
1518 lap->xport_logp);
1520 lap->apidp->xport_phys);
1523 clp->ap_r_state = lap->xport_rstate;
1524 clp->ap_o_state = lap->chld_config;
1529 (void) strncpy(clp->ap_type, lap->xport_type, sizeof (clp->ap_type));
1531 /* Link it in. lap->listp is NULL originally. */
1532 listp->next = lap->listp;
1533 /* lap->listp now gets cfga_list_data for the fca port. */
1534 lap->listp = listp;
1569 fpcfga_list_t *lap,
1583 assert(lap->apidp->xport_phys != NULL);
1584 assert(lap->xport_logp != NULL);
1608 if (((strcmp(lap->xport_type, FP_FC_FABRIC_PORT_TYPE) == 0) ||
1609 strcmp(lap->xport_type, FP_FC_PUBLIC_PORT_TYPE) == 0)) {
1610 lap->chld_config = CFGA_STAT_CONFIGURED;
1613 lap->chld_config = CFGA_STAT_CONFIGURED;
1623 if (lap->cmd == FPCFGA_STAT_FC_DEV) {
1642 if (lap->ret != FPCFGA_ACCESS_OK) {
1645 lap->chld_config = CFGA_STAT_CONFIGURED;
1666 if (((strcmp(lap->xport_type,
1668 (strcmp(lap->xport_type,
1670 (lap->ret == FPCFGA_ACCESS_OK)) {
1671 lap->chld_config = CFGA_STAT_CONFIGURED;
1673 lap->ret = FPCFGA_APID_NOEXIST;
1682 if (lap->ret == FPCFGA_ACCESS_OK) {
1688 lap->listp->ldata.ap_cond = cond;
1690 lap->listp->ldata.ap_o_state = CFGA_STAT_CONFIGURED;
1691 lap->listp->ldata.ap_busy = busy;
1692 lap->ret = FPCFGA_OK;
1702 if (lap->cmd == FPCFGA_STAT_ALL) {
1703 if (lap->listp != NULL) {
1708 ret = is_dyn_ap_on_ldata_list(dyncomp, lap->listp,
1713 lap->chld_config = CFGA_STAT_CONFIGURED;
1754 lap->ret = FPCFGA_OK;
1758 lap->l_errno = l_errno;
1766 lap->chld_config = CFGA_STAT_CONFIGURED;
1781 if ((strcmp(lap->xport_type,
1783 (strcmp(lap->xport_type,
1785 lap->chld_config =
1788 lap->ret = FPCFGA_OK;
1812 lap->chld_config = CFGA_STAT_CONFIGURED;
1826 if ((strcmp(lap->xport_type,
1828 (strcmp(lap->xport_type,
1830 lap->chld_config =
1833 lap->ret = FPCFGA_OK;
1846 lap->l_errno = errno;
1864 lap->xport_logp, DYN_SEP, dyncomp);
1867 lap->apidp->xport_phys, DYN_SEP, dyncomp);
1872 clp->ap_r_state = lap->xport_rstate;
1883 listp->next = lap->listp;
1884 lap->listp = listp;
1886 lap->ret = FPCFGA_OK;
1902 fpcfga_list_t *lap = NULL;
1904 lap = (fpcfga_list_t *)arg;
1905 if ((lap->apidp->flags & (FLAG_FCP_DEV)) == FLAG_FCP_DEV) {
1906 return (stat_path_info_FCP_dev(root, lap, l_errnop));
1908 return (stat_path_info_fc_dev(root, lap, l_errnop));
1930 fpcfga_list_t *lap,
1949 if ((lap->cmd == FPCFGA_STAT_FC_DEV) && (lap->ret == FPCFGA_OK)) {
1957 if ((lap->cmd == FPCFGA_STAT_FCA_PORT) &&
1958 (lap->chld_config == CFGA_STAT_CONFIGURED)) {
1971 if (lap->ret == FPCFGA_ACCESS_OK) {
1972 lap->ret = FPCFGA_OK;
1978 if (lap->cmd == FPCFGA_STAT_FCA_PORT) {
1979 if (((strcmp(lap->xport_type, FP_FC_FABRIC_PORT_TYPE) == 0) ||
1980 strcmp(lap->xport_type, FP_FC_PUBLIC_PORT_TYPE) == 0)) {
1981 lap->chld_config = CFGA_STAT_CONFIGURED;
1986 lap->chld_config = CFGA_STAT_CONFIGURED;
2004 switch (lap->cmd) {
2007 if (strncmp(port_wwn, lap->apidp->dyncomp,
2012 if (lap->ret == FPCFGA_ACCESS_OK) {
2013 lap->listp->ldata.ap_o_state =
2018 lap->listp->ldata.ap_cond =
2021 lap->ret = FPCFGA_OK;
2024 if ((strcmp(lap->xport_type,
2026 (strcmp(lap->xport_type,
2028 lap->chld_config = CFGA_STAT_CONFIGURED;
2030 path, port_wwn, l_errnop, lap));
2035 path, port_wwn, l_errnop, lap));
2037 lap->ret = FPCFGA_APID_NOEXIST;
2044 if (lap->listp != NULL) {
2046 lap->listp, &matchldp, l_errnop);
2048 lap->chld_config = CFGA_STAT_CONFIGURED;
2065 lap->l_errno = *l_errnop;
2074 if (((strcmp(lap->xport_type,
2076 (strcmp(lap->xport_type,
2080 lap->chld_config = CFGA_STAT_CONFIGURED;
2082 path, port_wwn, l_errnop, lap);
2090 lap->chld_config = CFGA_STAT_CONFIGURED;
2123 fpcfga_list_t *lap,
2145 if ((lap->cmd == FPCFGA_STAT_FCA_PORT) &&
2146 (lap->chld_config == CFGA_STAT_CONFIGURED)) {
2158 if (lap->ret == FPCFGA_ACCESS_OK) {
2159 lap->ret = FPCFGA_OK;
2168 if (lap->cmd == FPCFGA_STAT_FCA_PORT) {
2169 if (((strcmp(lap->xport_type, FP_FC_FABRIC_PORT_TYPE) == 0) ||
2170 strcmp(lap->xport_type, FP_FC_PUBLIC_PORT_TYPE) == 0)) {
2171 lap->chld_config = CFGA_STAT_CONFIGURED;
2176 lap->chld_config = CFGA_STAT_CONFIGURED;
2185 switch (lap->cmd) {
2193 *lun_nump, lap->listp, &matchldp))
2200 lap->chld_config = CFGA_STAT_CONFIGURED;
2214 lap->ret = FPCFGA_OK;
2218 if (strncmp(port_wwn, lap->apidp->dyncomp, WWN_SIZE*2)
2227 if (((strcmp(lap->xport_type,
2229 (strcmp(lap->xport_type,
2233 lap->chld_config = CFGA_STAT_CONFIGURED;
2252 lap->l_errno = errno;
2261 lap->xport_logp, DYN_SEP, port_wwn,
2265 lap->apidp->xport_phys, DYN_SEP, port_wwn,
2286 clp->ap_r_state = lap->xport_rstate;
2301 lun_nump, listp, &(lap->listp));
2311 *lun_nump, lap->listp, &matchldp))
2318 lap->chld_config = CFGA_STAT_CONFIGURED;
2339 if (((strcmp(lap->xport_type,
2341 (strcmp(lap->xport_type,
2345 lap->chld_config = CFGA_STAT_CONFIGURED;
2364 lap->l_errno = errno;
2373 lap->xport_logp, DYN_SEP, port_wwn,
2377 lap->apidp->xport_phys, DYN_SEP, port_wwn,
2398 clp->ap_r_state = lap->xport_rstate;
2413 lun_nump, listp, &(lap->listp));
2418 lap->chld_config = CFGA_STAT_CONFIGURED;
2419 lap->ret = FPCFGA_OK;
2426 lap->ret = FPCFGA_OK;
2456 fpcfga_list_t *lap,
2470 assert(lap->apidp->xport_phys != NULL);
2471 assert(lap->xport_logp != NULL);
2495 if (((strcmp(lap->xport_type, FP_FC_FABRIC_PORT_TYPE) == 0) ||
2496 strcmp(lap->xport_type, FP_FC_PUBLIC_PORT_TYPE) == 0)) {
2497 lap->chld_config = CFGA_STAT_CONFIGURED;
2500 lap->chld_config = CFGA_STAT_CONFIGURED;
2512 lap->l_errno = l_errno;
2517 lap->listp, &matchldp)) == FPCFGA_LIB_ERR) {
2518 lap->l_errno = l_errno;
2523 if (lap->cmd == FPCFGA_STAT_FC_DEV) {
2545 lap->chld_config = CFGA_STAT_CONFIGURED;
2566 if (((strcmp(lap->xport_type,
2568 (strcmp(lap->xport_type,
2570 (lap->ret == FPCFGA_ACCESS_OK)) {
2571 lap->chld_config = CFGA_STAT_CONFIGURED;
2574 * if lap->ret is okay there is at least
2578 if (lap->ret != FPCFGA_OK) {
2579 lap->ret = FPCFGA_APID_NOEXIST;
2606 lap->ret = FPCFGA_OK;
2617 if (lap->cmd == FPCFGA_STAT_ALL) {
2621 lap->chld_config = CFGA_STAT_CONFIGURED;
2660 lap->ret = FPCFGA_OK;
2668 lap->chld_config = CFGA_STAT_CONFIGURED;
2683 if ((strcmp(lap->xport_type,
2685 (strcmp(lap->xport_type,
2687 lap->chld_config =
2690 lap->ret = FPCFGA_OK;
2709 lap->l_errno = errno;
2718 "%s%s%s%s%d", lap->xport_logp, DYN_SEP, port_wwn,
2721 "%s%s%s%s%d", lap->apidp->xport_phys, DYN_SEP, port_wwn,
2724 clp->ap_r_state = lap->xport_rstate;
2734 &(lap->listp));
2736 lap->ret = FPCFGA_OK;
2874 fpcfga_list_t *lap)
2919 lap->xport_logp, DYN_SEP, pwwn);
2921 lap->apidp->xport_phys, DYN_SEP, pwwn);
2925 clp->ap_r_state = lap->xport_rstate;
2954 listp->next = lap->listp;
2955 lap->listp = listp;
2961 lap->ret = FPCFGA_OK;
2975 fpcfga_list_t *lap)
2983 lap->l_errno = errno;
2993 lap->xport_logp, DYN_SEP, dyncomp);
2996 lap->apidp->xport_phys, DYN_SEP, dyncomp);
2999 clp->ap_r_state = lap->xport_rstate;
3024 (void) insert_ldata_to_ldatalist(dyncomp, NULL, listp, &(lap->listp));
3042 fpcfga_list_t *lap,
3068 if ((ret = get_standard_inq_data(lap->apidp->xport_phys, port_wwn,
3133 "%s%s%s%s%d", lap->xport_logp, DYN_SEP, port_wwn,
3136 "%s%s%s%s%d", lap->apidp->xport_phys, DYN_SEP, port_wwn,
3140 clp->ap_r_state = lap->xport_rstate;
3183 if (lap->listp == NULL) {
3184 lap->listp = listp_start;
3191 dyn = GET_DYN(lap->listp->ldata.ap_phys_id);
3194 matchp_start = matchp_end = lap->listp;
3214 lap->listp->ldata.ap_cond;
3216 /* link the new elem of lap->listp. */
3221 /* link lap->listp to listp_start. */
3222 lap->listp = listp_start;
3229 listp_end->next = lap->listp->next;
3230 lap->listp = listp_start;
3235 prevlp = lap->listp;
3236 curlp = lap->listp->next;