v9/kmdb/kaif_startup.s

5  * Common Development and Distribution License (the "License").
11  * and limitations under the License.
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
22  * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved.
68  * size bits to the primary context page size bits and setting the primary
90 	 * the ID in %g1, and is allowed to clobber %g2.  It also assumes that
117 	 * back to TL=0.  We're currently at TL=1, and are on either the
121 	 * NOTE: This routine and kaif_trap_obp must be equivalent.
145 	 * our gregs pointer and the return %pstate value, so stash them in
153 	SWITCH_TO_NORMAL_GLOBALS();	/* saves %o5 and %o4 */
163 	 * Restore saved %o registers and return.
165 	SWITCH_TO_TL1_GLOBALS_AND_RET();	/* restores %o5 and %o4 */
169 	 * Save the remaining state, and prepare to enter the debugger.
227 	 * Save window state and windows
275 	 * We're almost done saving state.  Go back to the starting window, and
277 	 * saving state, and for the next stage of debugger startup/resumption,
286 	and	%g1, -STACK_ALIGN64, %g1
292 	 * We'll need to access cpusave and gregs for our final state-saving,
335 	 * for programmed entry, watchpoints, and breakpoints, and is entered at
341 	 *    or a programmed entry trap, and is *NOT* coming from OBP.  The CPU
365 	 *    watchpoints, place a programmed-entry trap at %npc, and release
369 	 *    entry trap.  We'll remove the trap, re-enable watchpoints, and
374 	 *    With breakpoints and programmed-entry traps, however, chances are
379 	 *    and will attempt to trigger a panic.
433 	/* Cases 1 and 2 - head into the debugger, via the state-saver */
445 	 * then shift the nucleus bits into the primary and set context to 0,
446 	 * Otherwise, flush TLBs and clear the entire context register since
455 	 * and set context to 0.  Use %g4 as a temporary.
466 	 * Flush TLBs and clear primary context register.
492 	 * SPARC only supports data watchpoints, and we know that only certain
507 	/* Case 5 - programmed entry from wapt step - restore and resume */
548 	 * 2. The CPU had already entered the debugger, and was spinning in the
552 	 *    One would lose, and would already be in the slave loop when the
558 	 *    it leaves OBP.  Arm the PROM-return programmed entry trap and
574 	 * until we've calculated the save address and have decided that we're
586 	 * then shift the nucleus bits into the primary and set context to 0,
587 	 * Otherwise, flush TLBs and clear the entire context register since
596 	 * and set context to 0.  Use %g2 as a temporary.
608 	 * Flush TLBs and clear primary context register.
686 	 * executing, and when we're single-stepping.  When a trap occurs that
694 	 * 1. The system is booting, and we encountered a trap that OBP couldn't
695 	 *    handle.  We save the CPU's state, and let it into the debugger.
699 	 *    state, and let it back into the debugger.
704 	 *    problem, and if the user decides to use the debugger to debug
709 	 * NOTE: The Forth word and the copying code here *must* be kept
760 	 * and %y if the user elects to panic.  We'll also need the saved outs if
794 	 * fault.  Re-arm the Forth word and transfer control to the debugger.
811 	 * problem in the debugger, and the user has elected to diagnose it
869 	 * then shift the nucleus bits into the primary and set context to 0,
870 	 * Otherwise, flush TLBs and clear the entire context register since
879 	 * and set context to 0.  Use %g4 as a temporary.
890 	 * Flush TLBs and clear primary context register.
918 	 * alignment and DTLB protection faults.