i386/i86pc/amd64.esc

111  * single-bit errors, but via separate serd engines to allow distinct
147 engine serd.memory.page_sb@chip/memory-controller/dimm/rank,
149 engine serd.memory.page_ck@chip/memory-controller/dimm/rank,
151 engine serd.memory.dimm_sb@chip/memory-controller/dimm/rank,
153 engine serd.memory.dimm_ck@chip/memory-controller/dimm/rank,
157     engine=serd.memory.page_sb@chip/memory-controller/dimm/rank;
160     engine=serd.memory.page_ck@chip/memory-controller/dimm/rank;
162     engine=serd.memory.dimm_sb@chip/memory-controller/dimm/rank;
164     engine=serd.memory.dimm_ck@chip/memory-controller/dimm/rank;
389 engine serd.cpu.amd.l2d_sb@chip/core/strand,
391 event fault.cpu.amd.l2cachedata@chip/core/strand, engine=serd.cpu.amd.l2d_sb@chip/core/strand;
428 engine serd.cpu.amd.l2t_sb@chip/core/strand,
430 event fault.cpu.amd.l2cachetag@chip/core/strand, engine=serd.cpu.amd.l2t_sb@chip/core/strand;
459 engine serd.cpu.amd.icachedata@chip/core/strand,
462     engine=serd.cpu.amd.icachedata@chip/core/strand;
477 engine serd.cpu.amd.icachetag@chip/core/strand,
479 event fault.cpu.amd.icachetag@chip/core/strand, engine=serd.cpu.amd.icachetag@chip/core/strand;
506 engine serd.cpu.amd.l1itlb@chip/core/strand,
508 event fault.cpu.amd.l1itlb@chip/core/strand, engine=serd.cpu.amd.l1itlb@chip/core/strand;
523 engine serd.cpu.amd.l2itlb@chip/core/strand,
525 event fault.cpu.amd.l2itlb@chip/core/strand, engine=serd.cpu.amd.l2itlb@chip/core/strand;
545 engine serd.cpu.amd.dc_sb@chip/core/strand,
547 event fault.cpu.amd.dcachedata@chip/core/strand, engine=serd.cpu.amd.dc_sb@chip/core/strand;