Lines Matching defs:tmp4

9110                                                   Register tmp, Register tmp3, Register tmp4) {
9118 // huge_128 tmp4 = (y[idx] * rdx) + z[kdx+idx] + carry2;
9119 // carry = (jlong)(tmp4 >>> 64);
9121 // z[kdx+idx] = (jlong)tmp4;
9147 mulxq(tmp4, tmp3, yz_idx1); // yz_idx1 * rdx -> tmp4:tmp3
9159 adcxq(tmp4, tmp);
9160 adoxq(tmp4, yz_idx2);
9166 add2_with_carry(tmp4, tmp3, carry, yz_idx1);
9167 add2_with_carry(carry2, tmp4, tmp, yz_idx2);
9175 movl(Address(z, idx, Address::times_4, 4), tmp4);
9176 shrq(tmp4, 32);
9177 movl(Address(z, idx, Address::times_4, 0), tmp4);
9192 mulxq(tmp4, tmp3, yz_idx1); // yz_idx1 * rdx -> tmp4:tmp3
9196 add2_with_carry(tmp4, tmp3, carry, yz_idx2);
9201 movq(carry, tmp4);
9208 movl(tmp4, Address(y, idx, Address::times_4, 0));
9209 mulxq(carry2, tmp3, tmp4); // tmp4 * rdx -> carry2:tmp3
9210 movl(tmp4, Address(z, idx, Address::times_4, 0));
9212 add2_with_carry(carry2, tmp3, tmp4, carry);
9236 * r15: tmp4
9241 Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5) {
9243 assert_different_registers(x, xlen, y, ylen, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5, rdx);
9248 push(tmp4);
9258 const Register y_idx = tmp4;
9352 multiply_128_x_128_bmi2_loop(y, z, carry, x, jdx, ylen, product, tmp2, x_xstart, tmp3, tmp4);
9387 pop(tmp4);
9622 void MacroAssembler::square_rshift(Register x, Register xlen, Register z, Register tmp1, Register tmp3, Register tmp4, Register tmp5, Register rdxReg, Register raxReg) {
9636 xorl(tmp4, tmp4); // index for z
9648 movq(Address(z, tmp4, Address::times_4, 0), raxReg);
9650 addl(tmp4, 2);
9669 movq(Address(z, tmp4, Address::times_4, 0), rdxReg);
9670 movq(Address(z, tmp4, Address::times_4, 8), raxReg);
9674 addl(tmp4, 4);
9743 void MacroAssembler::lshift_by_1(Register x, Register len, Register z, Register zlen, Register tmp1, Register tmp2, Register tmp3, Register tmp4) {
9751 const Register new_carry = tmp4;
9809 * r15: tmp4
9813 void MacroAssembler::square_to_len(Register x, Register len, Register z, Register zlen, Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5, Register rdxReg, Register raxReg) {
9819 push(tmp4);
9824 square_rshift(x, len, z, tmp1, tmp3, tmp4, tmp5, rdxReg, raxReg);
9845 const Register op1 = tmp4;
9919 lshift_by_1(x, len, z, zlen, tmp1, tmp2, tmp3, tmp4);
9927 pop(tmp4);
9947 Register tmp4, Register tmp5, Register rdxReg, Register raxReg) {
9963 const Register op1 = tmp4;
10013 * r15: tmp4
10019 Register tmp4, Register tmp5, Register rdxReg, Register raxReg) {
10034 push(tmp4);
10039 const Register op1 = tmp4;
10056 mul_add_128_x_32_loop(out, in, offs, len, tmp1, tmp2, tmp3, tmp4, tmp5, rdxReg, raxReg);
10091 mull(op1); //tmp4 * eax -> edx:eax
10106 pop(tmp4);
10458 Register tmp4, Register tmp5,
10481 tmp4, tmp5,
10588 Register tmp4, Register tmp5,
10616 tmp4 = tmp3;
10622 tmp4, tmp5,
10652 Register tmp4, Register tmp5, Register tmp6,
10685 tmp4, tmp5,
10691 tmp4, tmp5,
10697 tmp4, tmp5,
10729 Register tmp4, Register tmp5, Register tmp6,
10761 tmp4, tmp5,
10767 tmp4, tmp5,
10773 tmp4, tmp5,