Lines Matching refs:Ta
2286 void ushll(FloatRegister Vd, SIMD_Arrangement Ta, FloatRegister Vn, SIMD_Arrangement Tb, int shift) {
2294 assert((Tb >> 1) + 1 == (Ta >> 1), "Incompatible arrangement");
2299 void ushll2(FloatRegister Vd, SIMD_Arrangement Ta, FloatRegister Vn, SIMD_Arrangement Tb, int shift) {
2300 ushll(Vd, Ta, Vn, Tb, shift);
2329 void pmull(FloatRegister Vd, SIMD_Arrangement Ta, FloatRegister Vn, FloatRegister Vm, SIMD_Arrangement Tb) {
2331 assert((Ta == T1Q && (Tb == T1D || Tb == T2D)) ||
2332 (Ta == T8H && (Tb == T8B || Tb == T16B)), "Invalid Size specifier");
2333 int size = (Ta == T1Q) ? 0b11 : 0b00;
2337 void pmull2(FloatRegister Vd, SIMD_Arrangement Ta, FloatRegister Vn, FloatRegister Vm, SIMD_Arrangement Tb) {
2339 pmull(Vd, Ta, Vn, Vm, Tb);
2342 void uqxtn(FloatRegister Vd, SIMD_Arrangement Tb, FloatRegister Vn, SIMD_Arrangement Ta) {
2345 int size_a = (int)Ta >> 1;