Lines Matching refs:CFL_SA
48 #define CFL_SA 0x02 /* Unit mask accepts Self/Any bit */
174 { 0x62, CFL_SA, "BUS_DRDY_CLOCKS",
176 { 0x63, CFL_SA, "BUS_LOCK_CLOCKS",
181 { 0x65, CFL_SA, "BUS_TRAN_BRD",
183 { 0x66, CFL_SA, "BUS_TRAN_RFO",
185 { 0x67, CFL_SA, "BUS_TRANS_WB",
187 { 0x68, CFL_SA, "BUS_TRAN_IFETCH",
189 { 0x69, CFL_SA, "BUS_TRAN_INVAL",
191 { 0x6a, CFL_SA, "BUS_TRAN_PWR",
193 { 0x6b, CFL_SA, "BUS_TRANS_P",
195 { 0x6c, CFL_SA, "BUS_TRANS_IO",
197 { 0x6d, CFL_SA, "BUS_TRAN_DEF",
199 { 0x6e, CFL_SA, "BUS_TRAN_BURST",
201 { 0x6f, CFL_SA, "BUS_TRAN_MEM",
203 { 0x70, CFL_SA, "BUS_TRAN_ANY",
357 { 0x60, CFL_SA|CFL_UM, "BUS_REQ_OUTSTANDING",
359 { 0x61, CFL_SA, "BUS_BNR_DRV",
362 { 0x62, CFL_SA, "BUS_DRDY_CLOCKS",
364 { 0x63, CFL_SA|CFL_UM, "BUS_LOCK_CLOCKS",
369 { 0x65, CFL_SA|CFL_UM, "BUS_TRAN_BRD",
371 { 0x66, CFL_SA|CFL_UM, "BUS_TRAN_RFO",
373 { 0x67, CFL_SA|CFL_UM, "BUS_TRANS_WB",
375 { 0x68, CFL_SA|CFL_UM, "BUS_TRAN_IFETCH",
377 { 0x69, CFL_SA|CFL_UM, "BUS_TRAN_INVAL",
379 { 0x6a, CFL_SA|CFL_UM, "BUS_TRAN_PWR",
381 { 0x6b, CFL_SA|CFL_UM, "BUS_TRANS_P",
383 { 0x6c, CFL_SA|CFL_UM, "BUS_TRANS_IO",
385 { 0x6d, CFL_SA|CFL_UM, "BUS_TRAN_DEF",
387 { 0x6e, CFL_SA|CFL_UM, "BUS_TRAN_BURST",
389 { 0x6f, CFL_SA|CFL_UM, "BUS_TRAN_MEM",
391 { 0x70, CFL_SA|CFL_UM, "BUS_TRAN_ANY",
398 { 0x7a, CFL_SA, "BUS_HIT_DRV",
401 { 0x7b, CFL_SA, "BUS_HITM_DRV",
404 { 0x7d, CFL_SA, "BUS_NOT_IN_USE",