Lines Matching refs:R600_POWER_LEVEL_HIGH
442 pi->hw.sclks[R600_POWER_LEVEL_HIGH] =
447 pi->hw.high_sclk_index = R600_POWER_LEVEL_HIGH;
457 pi->hw.mclks[R600_POWER_LEVEL_HIGH] =
464 pi->hw.high_mclk_index = R600_POWER_LEVEL_HIGH;
486 pi->hw.vddc[R600_POWER_LEVEL_HIGH] = state->high.vddc;
492 pi->hw.backbias[R600_POWER_LEVEL_HIGH] =
499 pi->hw.pcie_gen2[R600_POWER_LEVEL_HIGH] =
506 pi->hw.high_vddc_index = R600_POWER_LEVEL_HIGH;
588 pi->hw.sclks[R600_POWER_LEVEL_HIGH],
589 R600_POWER_LEVEL_HIGH);
801 if (pi->hw.sclks[R600_POWER_LEVEL_HIGH] <
803 high_clock = pi->hw.sclks[R600_POWER_LEVEL_HIGH];
812 STATE2(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_HIGH]) |
813 STATE3(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_HIGH]));
822 pi->hw.sclks[R600_POWER_LEVEL_HIGH])) |
824 pi->hw.sclks[R600_POWER_LEVEL_HIGH])));
1156 r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_HIGH,
1158 r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_HIGH,
1160 r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_HIGH,
1163 r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_HIGH,
1166 r600_power_level_set_pcie_gen2(rdev, R600_POWER_LEVEL_HIGH,
1167 pi->hw.pcie_gen2[R600_POWER_LEVEL_HIGH]);
1340 r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, true);
1479 rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_HIGH, false);
1594 r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, true);
1630 r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false);
1675 r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false);
2147 r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false);