i915/display/vlv_dsi.c

41 #include "intel_dsi.h"
85 void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port)
87 	struct drm_encoder *encoder = &intel_dsi->base.base;
134 	struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev;
224 static int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs,
227 	struct drm_encoder *encoder = &intel_dsi->base.base;
275 	struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,
277 	struct intel_connector *intel_connector = intel_dsi->attached_connector;
299 	if (intel_dsi->pixel_format == MIPI_DSI_FMT_RGB888)
310 		if (intel_dsi->ports == BIT(PORT_C))
332 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
340 	for_each_dsi_port(port, intel_dsi->ports)
347 	for_each_dsi_port(port, intel_dsi->ports) {
354 	for_each_dsi_port(port, intel_dsi->ports) {
361 	for_each_dsi_port(port, intel_dsi->ports) {
372 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
376 	for_each_dsi_port(port, intel_dsi->ports) {
386 	for_each_dsi_port(port, intel_dsi->ports) {
415 	for_each_dsi_port(port, intel_dsi->ports) {
423 	for_each_dsi_port(port, intel_dsi->ports) {
434 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
441 	for_each_dsi_port(port, intel_dsi->ports) {
447 	for_each_dsi_port(port, intel_dsi->ports) {
460 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
474 	for_each_dsi_port(port, intel_dsi->ports) {
512 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
516 	for_each_dsi_port(port, intel_dsi->ports)
521 	for_each_dsi_port(port, intel_dsi->ports) {
528 	for_each_dsi_port(port, intel_dsi->ports) {
539 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
546 	for_each_dsi_port(port, intel_dsi->ports) {
553 	for_each_dsi_port(port, intel_dsi->ports)
566 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
570 	for_each_dsi_port(port, intel_dsi->ports) {
610 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
613 	if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) {
614 		u32 temp = intel_dsi->pixel_overlap;
617 			for_each_dsi_port(port, intel_dsi->ports)
628 	for_each_dsi_port(port, intel_dsi->ports) {
638 		if (intel_dsi->ports == (BIT(PORT_A) | BIT(PORT_C))) {
639 			temp |= (intel_dsi->dual_link - 1)
649 		if (intel_dsi->pixel_format != MIPI_DSI_FMT_RGB888)
662 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
665 	for_each_dsi_port(port, intel_dsi->ports) {
724 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
733 	intel_dsi_wait_panel_power_cycle(intel_dsi);
768 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
769 	drm_msleep(intel_dsi->panel_on_delay);
770 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
788 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_INIT_OTP);
794 	if (is_cmd_mode(intel_dsi)) {
795 		for_each_dsi_port(port, intel_dsi->ports)
798 		intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_TEAR_ON);
799 		intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON);
802 		for_each_dsi_port(port, intel_dsi->ports)
803 			dpi_send_cmd(intel_dsi, TURN_ON, false, port);
806 		intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON);
812 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);
833 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
838 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_OFF);
846 	if (is_vid_mode(intel_dsi)) {
848 		for_each_dsi_port(port, intel_dsi->ports)
849 			dpi_send_cmd(intel_dsi, SHUTDOWN, false, port);
870 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
881 	if (is_vid_mode(intel_dsi)) {
882 		for_each_dsi_port(port, intel_dsi->ports)
883 			vlv_dsi_wait_for_fifo_empty(intel_dsi, port);
895 	if (is_cmd_mode(intel_dsi))
896 		intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_TEAR_OFF);
897 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_OFF);
922 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET);
924 	drm_msleep(intel_dsi->panel_off_delay);
925 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_OFF);
927 	intel_dsi->panel_power_off_time = ktime_get_boottime();
934 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
956 	for_each_dsi_port(port, intel_dsi->ports) {
1015 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
1016 	unsigned int lane_count = intel_dsi->lane_count;
1031 	for_each_dsi_port(port, intel_dsi->ports) {
1069 						intel_dsi->burst_mode_ratio);
1071 						intel_dsi->burst_mode_ratio);
1073 						intel_dsi->burst_mode_ratio);
1075 	if (intel_dsi->dual_link) {
1115 	if (intel_dsi->dual_link) {
1122 						intel_dsi->burst_mode_ratio);
1124 			    intel_dsi->burst_mode_ratio);
1126 						intel_dsi->burst_mode_ratio);
1130 						intel_dsi->burst_mode_ratio);
1132 						intel_dsi->burst_mode_ratio);
1134 						intel_dsi->burst_mode_ratio);
1136 	if (intel_dsi->dual_link) {
1173 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
1191 	if (intel_dsi->dual_link)
1214 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(to_intel_encoder(encoder));
1216 	unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
1217 	unsigned int lane_count = intel_dsi->lane_count;
1226 	if (intel_dsi->dual_link) {
1228 		if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK)
1229 			hactive += intel_dsi->pixel_overlap;
1241 			      intel_dsi->burst_mode_ratio);
1242 	hfp = txbyteclkhs(hfp, bpp, lane_count, intel_dsi->burst_mode_ratio);
1244 			    intel_dsi->burst_mode_ratio);
1245 	hbp = txbyteclkhs(hbp, bpp, lane_count, intel_dsi->burst_mode_ratio);
1247 	for_each_dsi_port(port, intel_dsi->ports) {
1305 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(to_intel_encoder(encoder));
1308 	unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
1316 	if (intel_dsi->dual_link) {
1318 		if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK)
1319 			mode_hdisplay += intel_dsi->pixel_overlap;
1322 	for_each_dsi_port(port, intel_dsi->ports) {
1350 			       intel_dsi->dphy_reg);
1358 	val = intel_dsi->lane_count << DATA_LANES_PRG_REG_SHIFT;
1359 	if (is_cmd_mode(intel_dsi)) {
1360 		val |= intel_dsi->channel << CMD_MODE_CHANNEL_NUMBER_SHIFT;
1363 		val |= intel_dsi->channel << VID_MODE_CHANNEL_NUMBER_SHIFT;
1364 		val |= pixel_format_to_reg(intel_dsi->pixel_format);
1368 	if (intel_dsi->eotp_pkt == 0)
1370 	if (intel_dsi->clock_stop)
1375 		if (!is_cmd_mode(intel_dsi))
1379 	for_each_dsi_port(port, intel_dsi->ports) {
1399 		if (is_vid_mode(intel_dsi) &&
1400 			intel_dsi->video_mode == BURST_MODE) {
1402 				       txbyteclkhs(adjusted_mode->crtc_htotal, bpp, intel_dsi->lane_count, intel_dsi->burst_mode_ratio) + 1);
1405 				       txbyteclkhs(adjusted_mode->crtc_vtotal * adjusted_mode->crtc_htotal, bpp, intel_dsi->lane_count, intel_dsi->burst_mode_ratio) + 1);
1408 			       intel_dsi->lp_rx_timeout);
1410 			       intel_dsi->turn_arnd_val);
1412 			       intel_dsi->rst_timer_val);
1418 			       txclkesc(intel_dsi->escape_clk_div, 100));
1421 		    !intel_dsi->dual_link) {
1430 				       intel_dsi->init_count);
1438 			       intel_dsi->init_count);
1446 			       intel_dsi->hs_to_lp_count);
1455 			       intel_dsi->lp_byte_clk);
1459 				       intel_dsi->lp_byte_clk);
1462 				       intel_dsi->dphy_reg);
1471 			       intel_dsi->bw_timer);
1474 			       intel_dsi->clk_lp_to_hs_count << LP_HS_SSW_CNT_SHIFT | intel_dsi->clk_hs_to_lp_count << HS_LP_PWR_SW_CNT_SHIFT);
1476 		if (is_vid_mode(intel_dsi)) {
1477 			u32 fmt = intel_dsi->video_frmt_cfg_bits | IP_TG_CONFIG;
1486 			switch (intel_dsi->video_mode) {
1488 				MISSING_CASE(intel_dsi->video_mode);
1509 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
1515 	for_each_dsi_port(port, intel_dsi->ports) {
1533 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(to_intel_encoder(encoder));
1535 	intel_dsi_vbt_gpio_cleanup(intel_dsi);
1597 static void vlv_dphy_param_init(struct intel_dsi *intel_dsi)
1599 	struct drm_device *dev = intel_dsi->base.base.dev;
1601 	struct intel_connector *connector = intel_dsi->attached_connector;
1611 	tlpx_ns = intel_dsi_tlpx_ns(intel_dsi);
1613 	switch (intel_dsi->lane_count) {
1629 	ui_den = intel_dsi_bitrate(intel_dsi);
1638 	intel_dsi->lp_byte_clk = DIV_ROUND_UP(tlpx_ns * ui_den, 8 * ui_num);
1705 	intel_dsi->dphy_reg = exit_zero_cnt << 24 | trail_cnt << 16 |
1728 	intel_dsi->hs_to_lp_count = max(lp_to_hs_switch, hs_to_lp_switch);
1729 	intel_dsi->hs_to_lp_count += extra_byte_count;
1740 	intel_dsi->clk_lp_to_hs_count =
1746 	intel_dsi->clk_lp_to_hs_count += extra_byte_count;
1755 	intel_dsi->clk_hs_to_lp_count =
1758 	intel_dsi->clk_hs_to_lp_count += extra_byte_count;
1760 	intel_dsi_log_params(intel_dsi);
1765 	struct intel_dsi *intel_dsi;
1785 	intel_dsi = kzalloc(sizeof(*intel_dsi), GFP_KERNEL);
1786 	if (!intel_dsi)
1791 		kfree(intel_dsi);
1795 	intel_encoder = &intel_dsi->base;
1797 	intel_dsi->attached_connector = intel_connector;
1833 	intel_dsi->panel_power_off_time = ktime_get_boottime();
1838 		intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C);
1840 		intel_dsi->ports = BIT(port);
1842 	if (drm_WARN_ON(&dev_priv->drm, intel_connector->panel.vbt.dsi.bl_ports & ~intel_dsi->ports))
1843 		intel_connector->panel.vbt.dsi.bl_ports &= intel_dsi->ports;
1845 	if (drm_WARN_ON(&dev_priv->drm, intel_connector->panel.vbt.dsi.cabc_ports & ~intel_dsi->ports))
1846 		intel_connector->panel.vbt.dsi.cabc_ports &= intel_dsi->ports;
1849 	for_each_dsi_port(port, intel_dsi->ports) {
1852 		host = intel_dsi_host_init(intel_dsi, &intel_dsi_host_ops,
1857 		intel_dsi->dsi_hosts[port] = host;
1860 	if (!intel_dsi_vbt_init(intel_dsi, MIPI_DSI_GENERIC_PANEL_ID)) {
1869 			    intel_dsi->pclk, current_mode->clock);
1870 		if (intel_fuzzy_clock_check(intel_dsi->pclk,
1873 			intel_dsi->pclk = current_mode->clock;
1879 	vlv_dphy_param_init(intel_dsi);
1881 	intel_dsi_vbt_gpio_init(intel_dsi,
1914 	kfree(intel_dsi);