i915/display/skl_watermark.c

634 	struct intel_dbuf_state *new_dbuf_state =
645 	if (new_dbuf_state->weight[pipe] == 0) {
646 		skl_ddb_entry_init(&new_dbuf_state->ddb[pipe], 0, 0);
650 	dbuf_slice_mask = new_dbuf_state->slices[pipe];
656 	intel_crtc_dbuf_weights(new_dbuf_state, pipe,
662 	skl_ddb_entry_init(&new_dbuf_state->ddb[pipe],
667 	if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe] &&
669 				&new_dbuf_state->ddb[pipe]))
672 	ret = intel_atomic_lock_global_state(&new_dbuf_state->base);
684 	crtc_state->wm.skl.ddb.start = mbus_offset + new_dbuf_state->ddb[pipe].start;
685 	crtc_state->wm.skl.ddb.end = mbus_offset + new_dbuf_state->ddb[pipe].end;
690 		    old_dbuf_state->slices[pipe], new_dbuf_state->slices[pipe],
692 		    new_dbuf_state->ddb[pipe].start, new_dbuf_state->ddb[pipe].end,
693 		    old_dbuf_state->active_pipes, new_dbuf_state->active_pipes);
2563 	struct intel_dbuf_state *new_dbuf_state = NULL;
2570 		new_dbuf_state = intel_atomic_get_dbuf_state(state);
2571 		if (IS_ERR(new_dbuf_state))
2572 			return PTR_ERR(new_dbuf_state);
2578 	if (!new_dbuf_state)
2581 	new_dbuf_state->active_pipes =
2584 	if (old_dbuf_state->active_pipes != new_dbuf_state->active_pipes) {
2585 		ret = intel_atomic_lock_global_state(&new_dbuf_state->base);
2591 		new_dbuf_state->joined_mbus =
2592 			adlp_check_mbus_joined(new_dbuf_state->active_pipes);
2597 		new_dbuf_state->slices[pipe] =
2598 			skl_compute_dbuf_slices(crtc, new_dbuf_state->active_pipes,
2599 						new_dbuf_state->joined_mbus);
2601 		if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe])
2604 		ret = intel_atomic_lock_global_state(&new_dbuf_state->base);
2609 	new_dbuf_state->enabled_slices = intel_dbuf_enabled_slices(new_dbuf_state);
2611 	if (old_dbuf_state->enabled_slices != new_dbuf_state->enabled_slices ||
2612 	    old_dbuf_state->joined_mbus != new_dbuf_state->joined_mbus) {
2613 		ret = intel_atomic_serialize_global_state(&new_dbuf_state->base);
2617 		if (old_dbuf_state->joined_mbus != new_dbuf_state->joined_mbus) {
2627 			    new_dbuf_state->enabled_slices,
2630 			    str_yes_no(new_dbuf_state->joined_mbus));
2636 		new_dbuf_state->weight[pipe] = intel_crtc_ddb_weight(new_crtc_state);
2638 		if (old_dbuf_state->weight[pipe] == new_dbuf_state->weight[pipe])
2641 		ret = intel_atomic_lock_global_state(&new_dbuf_state->base);
3515 	const struct intel_dbuf_state *new_dbuf_state =
3520 	if (!new_dbuf_state ||
3521 	    (new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices &&
3522 	     new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus))
3525 	WARN_ON(!new_dbuf_state->base.changed);
3530 				new_dbuf_state->enabled_slices);
3536 	const struct intel_dbuf_state *new_dbuf_state =
3541 	if (!new_dbuf_state ||
3542 	    (new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices &&
3543 	     new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus))
3546 	WARN_ON(!new_dbuf_state->base.changed);
3549 				new_dbuf_state->enabled_slices);
3574 	const struct intel_dbuf_state *new_dbuf_state, *old_dbuf_state;
3583 	new_dbuf_state = intel_atomic_get_new_dbuf_state(state);
3585 	if (!new_dbuf_state ||
3586 	    (new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus &&
3587 	     new_dbuf_state->active_pipes == old_dbuf_state->active_pipes))
3600 		val |= new_dbuf_state->joined_mbus ? MBUS_DBOX_A_CREDIT(12) :
3604 		val |= new_dbuf_state->joined_mbus ? MBUS_DBOX_A_CREDIT(6) :
3630 							      new_dbuf_state->active_pipes))