Lines Matching refs:temp
364 u32 temp;
378 temp = intel_de_read(dev_priv, PCH_DPLL_SEL);
379 temp |= TRANS_DPLL_ENABLE(pipe);
383 temp |= sel;
385 temp &= ~sel;
386 intel_de_write(dev_priv, PCH_DPLL_SEL, temp);
419 temp = intel_de_read(dev_priv, reg);
420 temp &= ~(TRANS_DP_PORT_SEL_MASK |
424 temp |= TRANS_DP_OUTPUT_ENABLE;
425 temp |= bpc << 9; /* same format but at 11:9 */
428 temp |= TRANS_DP_HSYNC_ACTIVE_HIGH;
430 temp |= TRANS_DP_VSYNC_ACTIVE_HIGH;
434 temp |= TRANS_DP_PORT_SEL(port);
436 intel_de_write(dev_priv, reg, temp);