i915/display/intel_fifo_underrun.c

41  * The i915 driver checks for display fifo underruns using the interrupt signals
309  * @enable: whether underruns should be reported or not
312  * modeset code to avoid false positives since on many platforms underruns are
339  * @enable: whether underruns should be reported or not
341  * This function makes us disable or enable PCH fifo underruns for a specific
398 	u32 underruns = 0;
404 	/* GMCH can't disable fifo underruns, filter them. */
421 		underruns = intel_de_read(dev_priv, ICL_PIPESTATUS(pipe)) &
423 		intel_de_write(dev_priv, ICL_PIPESTATUS(pipe), underruns);
432 				underruns & PIPE_STATUS_SOFT_UNDERRUN_XELPD ? "soft," : "",
433 				underruns & PIPE_STATUS_HARD_UNDERRUN_XELPD ? "hard," : "",
434 				underruns & PIPE_STATUS_PORT_UNDERRUN_XELPD ? "port," : "",
435 				underruns & PIPE_STATUS_UNDERRUN ? "transcoder," : "");
464  * intel_check_cpu_fifo_underruns - check for CPU fifo underruns immediately
467  * Check for CPU fifo underruns immediately. Useful on IVB/HSW where the shared
468  * error interrupt may have been disabled, and so CPU fifo underruns won't
469  * necessarily raise an interrupt, and on GMCH platforms where underruns never
492  * intel_check_pch_fifo_underruns - check for PCH fifo underruns immediately
495  * Check for PCH fifo underruns immediately. Useful on CPT/PPT where the shared
496  * error interrupt may have been disabled, and so PCH fifo underruns won't