Lines Matching refs:page_mask
1572 u32 page_mask;
1578 { .num_channels = 1, .type = INTEL_DRAM_DDR4, .page_mask = 0xF },
1579 { .num_channels = 1, .type = INTEL_DRAM_DDR5, .page_mask = 0xF },
1580 { .num_channels = 2, .type = INTEL_DRAM_LPDDR4, .page_mask = 0x1C },
1581 { .num_channels = 2, .type = INTEL_DRAM_LPDDR5, .page_mask = 0x1C },
1582 { .num_channels = 2, .type = INTEL_DRAM_DDR4, .page_mask = 0x1F },
1583 { .num_channels = 2, .type = INTEL_DRAM_DDR5, .page_mask = 0x1E },
1584 { .num_channels = 4, .type = INTEL_DRAM_LPDDR4, .page_mask = 0x38 },
1585 { .num_channels = 4, .type = INTEL_DRAM_LPDDR5, .page_mask = 0x38 },
1590 { .num_channels = 1, .type = INTEL_DRAM_LPDDR4, .page_mask = 0x1 },
1591 { .num_channels = 1, .type = INTEL_DRAM_DDR4, .page_mask = 0x1 },
1592 { .num_channels = 1, .type = INTEL_DRAM_DDR5, .page_mask = 0x1 },
1593 { .num_channels = 1, .type = INTEL_DRAM_LPDDR5, .page_mask = 0x1 },
1594 { .num_channels = 2, .type = INTEL_DRAM_LPDDR4, .page_mask = 0x3 },
1595 { .num_channels = 2, .type = INTEL_DRAM_DDR4, .page_mask = 0x3 },
1596 { .num_channels = 2, .type = INTEL_DRAM_DDR5, .page_mask = 0x3 },
1597 { .num_channels = 2, .type = INTEL_DRAM_LPDDR5, .page_mask = 0x3 },
1620 for (config = 0; table[config].page_mask != 0; config++)
1625 if (table[config].page_mask == 0) {
1634 table[config].page_mask);