pci/drm/drm_edid.c

6045 static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc,
6048 	hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2;
6050 	if (!hdmi_dsc->v_1p2)
6053 	hdmi_dsc->native_420 = hf_scds[11] & DRM_EDID_DSC_NATIVE_420;
6054 	hdmi_dsc->all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP;
6057 		hdmi_dsc->bpc_supported = 16;
6059 		hdmi_dsc->bpc_supported = 12;
6061 		hdmi_dsc->bpc_supported = 10;
6064 		hdmi_dsc->bpc_supported = 8;
6071 		drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes,
6072 				     &hdmi_dsc->max_frl_rate_per_lane);
6078 			hdmi_dsc->max_slices = 1;
6079 			hdmi_dsc->clk_per_slice = 340;
6082 			hdmi_dsc->max_slices = 2;
6083 			hdmi_dsc->clk_per_slice = 340;
6086 			hdmi_dsc->max_slices = 4;
6087 			hdmi_dsc->clk_per_slice = 340;
6090 			hdmi_dsc->max_slices = 8;
6091 			hdmi_dsc->clk_per_slice = 340;
6094 			hdmi_dsc->max_slices = 8;
6095 			hdmi_dsc->clk_per_slice = 400;
6098 			hdmi_dsc->max_slices = 12;
6099 			hdmi_dsc->clk_per_slice = 400;
6102 			hdmi_dsc->max_slices = 16;
6103 			hdmi_dsc->clk_per_slice = 400;
6107 			hdmi_dsc->max_slices = 0;
6108 			hdmi_dsc->clk_per_slice = 0;
6113 		hdmi_dsc->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
6122 	struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
6172 		drm_parse_dsc_info(hdmi_dsc, hf_scds);