Lines Matching defs:dcfclk_sta_targets
354 unsigned int dcfclk_sta_targets[DC__VOLTAGE_STATES] = {199, 615, 906, 1324, 1564};
435 entry.dcfclk_mhz = dcfclk_sta_targets[i];
703 unsigned int dcfclk_sta_targets[DC__VOLTAGE_STATES] = {615, 906, 1324, 1564};
726 if (max_dcfclk_mhz > dcfclk_sta_targets[num_dcfclk_sta_targets-1]) {
728 dcfclk_sta_targets[num_dcfclk_sta_targets] = max_dcfclk_mhz;
730 } else if (max_dcfclk_mhz < dcfclk_sta_targets[num_dcfclk_sta_targets-1]) {
733 if (dcfclk_sta_targets[i] > max_dcfclk_mhz) {
734 dcfclk_sta_targets[i] = max_dcfclk_mhz;
756 if (dcfclk_sta_targets[i] < optimal_dcfclk_for_uclk[j]) {
768 if (dcfclk_sta_targets[i] < optimal_dcfclk_for_uclk[j] && i < num_dcfclk_sta_targets) {
769 dcfclk_mhz[num_states] = dcfclk_sta_targets[i];
782 dcfclk_mhz[num_states] = dcfclk_sta_targets[i];