Lines Matching defs:vbios
79 const struct bw_calcs_vbios *vbios,
141 yclk[low] = vbios->low_yclk;
142 yclk[mid] = vbios->mid_yclk;
143 yclk[high] = vbios->high_yclk;
144 sclk[s_low] = vbios->low_sclk;
145 sclk[s_mid1] = vbios->mid1_sclk;
146 sclk[s_mid2] = vbios->mid2_sclk;
147 sclk[s_mid3] = vbios->mid3_sclk;
148 sclk[s_mid4] = vbios->mid4_sclk;
149 sclk[s_mid5] = vbios->mid5_sclk;
150 sclk[s_mid6] = vbios->mid6_sclk;
151 sclk[s_high] = vbios->high_sclk;
249 data->scatter_gather_enable_for_pipe[0] = vbios->scatter_gather_enable;
250 data->scatter_gather_enable_for_pipe[1] = vbios->scatter_gather_enable;
251 data->scatter_gather_enable_for_pipe[2] = vbios->scatter_gather_enable;
252 data->scatter_gather_enable_for_pipe[3] = vbios->scatter_gather_enable;
337 data->scatter_gather_enable_for_pipe[i] = vbios->scatter_gather_enable;
348 data->compression_rate[i] = bw_int_to_fixed(vbios->average_compression_rate);
361 data->cursor_width_pixels[i] = bw_int_to_fixed(vbios->cursor_width);
608 data->number_of_dram_wrchannels = vbios->number_of_dram_channels;
609 data->number_of_dram_channels = vbios->number_of_dram_channels;
616 if (vbios->memory_type == bw_def_hbm)
636 if (vbios->memory_type == bw_def_hbm)
1064 data->inefficient_linear_pitch_in_bytes = bw_mul(bw_mul(bw_int_to_fixed(256), bw_int_to_fixed(vbios->number_of_dram_banks)), bw_int_to_fixed(data->number_of_dram_channels));
1110 data->bytes_per_page_close_open = bw_mul(data->lines_interleaved_in_mem_access[i], bw_max2(bw_mul(bw_mul(bw_mul(bw_int_to_fixed(data->bytes_per_pixel[i]), data->tile_width_in_pixels), bw_int_to_fixed(vbios->number_of_dram_banks)), bw_int_to_fixed(data->number_of_dram_channels)), bw_mul(bw_int_to_fixed(data->bytes_per_pixel[i]), data->scatter_gather_page_width[i])));
1126 data->dmif_total_page_close_open_time = bw_div(bw_mul((bw_add(bw_add(data->dmif_total_number_of_data_request_page_close_open, data->scatter_gather_total_pte_request_groups), data->cursor_total_request_groups)), vbios->trc), bw_int_to_fixed(1000));
1127 data->mcifwr_total_page_close_open_time = bw_div(bw_mul(data->mcifwr_total_number_of_data_request_page_close_open, vbios->trc), bw_int_to_fixed(1000));
1141 data->total_dmifmc_urgent_trips = bw_ceil2(bw_div(data->total_requests_for_adjusted_dmif_size, (bw_add(dceip->dmif_request_buffer_size, bw_int_to_fixed(vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel * data->number_of_dram_channels)))), bw_int_to_fixed(1));
1142 data->total_dmifmc_urgent_latency = bw_mul(vbios->dmifmc_urgent_latency, data->total_dmifmc_urgent_trips);
1161 if (vbios->memory_type == bw_def_hbm) {
1165 data->display_reads_required_dram_access_data = bw_mul(data->adjusted_data_buffer_size_in_memory[i], bw_ceil2(bw_div(bw_int_to_fixed((8 * vbios->dram_channel_width_in_bits / 8)), data->bytes_per_request[i]), bw_int_to_fixed(1)));
1172 data->total_display_writes_required_dram_access_data = bw_add(data->total_display_writes_required_dram_access_data, bw_mul(data->adjusted_data_buffer_size_in_memory[i], bw_ceil2(bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits), data->bytes_per_request[i]), bw_int_to_fixed(1))));
1199 data->dmif_burst_time[i][j] = bw_max3(data->dmif_total_page_close_open_time, bw_div(data->total_display_reads_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels)))), bw_div(data->total_display_reads_required_data, (bw_mul(bw_mul(sclk[j], vbios->data_return_bus_width), bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100)))));
1201 data->mcifwr_burst_time[i][j] = bw_max3(data->mcifwr_total_page_close_open_time, bw_div(data->total_display_writes_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_wrchannels)))), bw_div(data->total_display_writes_required_data, (bw_mul(sclk[j], vbios->data_return_bus_width))));
1212 data->dmif_buffer_transfer_time[i] = bw_mul(data->source_width_rounded_up_to_chunks[i], (bw_div(dceip->lb_write_pixels_per_dispclk, (bw_div(vbios->low_voltage_max_dispclk, dceip->display_pipe_throughput_factor)))));
1263 data->line_source_transfer_time[i][j][k] = bw_max2(bw_mul((bw_add(vbios->mcifwrmc_urgent_latency, data->mcifwr_burst_time[j][k])), bw_floor2(bw_div(data->src_data_for_first_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), bw_sub(bw_mul((bw_add(vbios->mcifwrmc_urgent_latency, data->mcifwr_burst_time[j][k])), bw_floor2(bw_div(data->src_data_for_last_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), data->active_time[i]));
1269 data->dram_speed_change_line_source_transfer_time[i][j][k] = bw_max2((bw_add((bw_div(data->src_data_for_first_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(data->bytes_per_request[i], vbios->low_voltage_max_dispclk), bw_int_to_fixed(2))))), (bw_mul(data->mcifwr_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_first_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1)))))), (bw_add((bw_div(data->src_data_for_last_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(data->bytes_per_request[i], vbios->low_voltage_max_dispclk), bw_int_to_fixed(2))))), (bw_sub(bw_mul(data->mcifwr_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_last_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), data->active_time[i])))));
1331 if (data->enable[k] && bw_mtn(vbios->blackout_duration, bw_int_to_fixed(0))) {
1333 data->blackout_duration_margin[i][j] = bw_min2(data->blackout_duration_margin[i][j], bw_sub(bw_sub(bw_sub(data->minimum_latency_hiding_with_cursor[k], vbios->blackout_duration), data->dmif_burst_time[i][j]), data->line_source_transfer_time[k][i][j]));
1334 data->dispclk_required_for_blackout_duration[i][j] = bw_max3(data->dispclk_required_for_blackout_duration[i][j], bw_div(bw_div(bw_mul(data->src_pixels_for_first_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_sub(bw_sub(data->minimum_latency_hiding_with_cursor[k], vbios->blackout_duration), data->dmif_burst_time[i][j]))), bw_div(bw_div(bw_mul(data->src_pixels_for_last_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_add(bw_sub(bw_sub(data->minimum_latency_hiding_with_cursor[k], vbios->blackout_duration), data->dmif_burst_time[i][j]), data->active_time[k]))));
1335 if (bw_leq(vbios->maximum_blackout_recovery_time, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j]))) {
1338 else if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j])))))) {
1339 data->dispclk_required_for_blackout_recovery[i][j] = bw_max2(data->dispclk_required_for_blackout_recovery[i][j], bw_div(bw_mul(bw_div(bw_div((bw_sub(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, vbios->maximum_blackout_recovery_time))), data->adjusted_data_buffer_size[k])), bw_int_to_fixed(data->bytes_per_pixel[k])), (bw_sub(vbios->maximum_blackout_recovery_time, bw_sub(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j])))), data->latency_hiding_lines[k]), data->lines_interleaved_in_mem_access[k]));
1343 data->blackout_duration_margin[i][j] = bw_min2(data->blackout_duration_margin[i][j], bw_sub(bw_sub(bw_sub(bw_sub(data->minimum_latency_hiding_with_cursor[k], vbios->blackout_duration), data->dmif_burst_time[i][j]), data->mcifwr_burst_time[i][j]), data->line_source_transfer_time[k][i][j]));
1344 data->dispclk_required_for_blackout_duration[i][j] = bw_max3(data->dispclk_required_for_blackout_duration[i][j], bw_div(bw_div(bw_mul(data->src_pixels_for_first_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_sub(bw_sub(bw_sub(data->minimum_latency_hiding_with_cursor[k], vbios->blackout_duration), data->dmif_burst_time[i][j]), data->mcifwr_burst_time[i][j]))), bw_div(bw_div(bw_mul(data->src_pixels_for_last_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_add(bw_sub(bw_sub(bw_sub(data->minimum_latency_hiding_with_cursor[k], vbios->blackout_duration), data->dmif_burst_time[i][j]), data->mcifwr_burst_time[i][j]), data->active_time[k]))));
1345 if (bw_ltn(vbios->maximum_blackout_recovery_time, bw_add(bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->dmif_burst_time[i][j]), data->mcifwr_burst_time[i][j]))) {
1348 else if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j])))))) {
1349 data->dispclk_required_for_blackout_recovery[i][j] = bw_max2(data->dispclk_required_for_blackout_recovery[i][j], bw_div(bw_mul(bw_div(bw_div((bw_sub(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, vbios->maximum_blackout_recovery_time))), data->adjusted_data_buffer_size[k])), bw_int_to_fixed(data->bytes_per_pixel[k])), (bw_sub(vbios->maximum_blackout_recovery_time, (bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j]))))), data->latency_hiding_lines[k]), data->lines_interleaved_in_mem_access[k]));
1356 if (bw_mtn(data->blackout_duration_margin[high][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[high][s_high], vbios->high_voltage_max_dispclk)) {
1358 if (bw_ltn(data->dispclk_required_for_blackout_recovery[high][s_high], vbios->high_voltage_max_dispclk)) {
1394 data->dram_speed_change_margin = bw_sub(bw_sub(bw_sub(data->maximum_latency_hiding_with_cursor[k], vbios->nbp_state_change_latency), data->dmif_burst_time[i][j]), data->dram_speed_change_line_source_transfer_time[k][i][j]);
1399 data->dispclk_required_for_dram_speed_change_pipe[i][j] = bw_max2(bw_div(bw_div(bw_mul(data->src_pixels_for_first_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_sub(bw_sub(bw_sub(data->maximum_latency_hiding_with_cursor[k], vbios->nbp_state_change_latency), data->dmif_burst_time[i][j]), data->dram_speed_change_line_source_transfer_time[k][i][j]))), bw_div(bw_div(bw_mul(data->src_pixels_for_last_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_add(bw_sub(bw_sub(bw_sub(data->maximum_latency_hiding_with_cursor[k], vbios->nbp_state_change_latency), data->dmif_burst_time[i][j]), data->dram_speed_change_line_source_transfer_time[k][i][j]), data->active_time[k]))));
1400 if ((bw_ltn(data->dispclk_required_for_dram_speed_change_pipe[i][j], vbios->high_voltage_max_dispclk))) {
1408 data->dram_speed_change_margin = bw_sub(bw_sub(bw_sub(bw_sub(data->maximum_latency_hiding_with_cursor[k], vbios->nbp_state_change_latency), data->dmif_burst_time[i][j]), data->mcifwr_burst_time[i][j]), data->dram_speed_change_line_source_transfer_time[k][i][j]);
1413 data->dispclk_required_for_dram_speed_change_pipe[i][j] = bw_max2(bw_div(bw_div(bw_mul(data->src_pixels_for_first_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_sub(bw_sub(bw_sub(bw_sub(data->maximum_latency_hiding_with_cursor[k], vbios->nbp_state_change_latency), data->dmif_burst_time[i][j]), data->dram_speed_change_line_source_transfer_time[k][i][j]), data->mcifwr_burst_time[i][j]))), bw_div(bw_div(bw_mul(data->src_pixels_for_last_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_add(bw_sub(bw_sub(bw_sub(bw_sub(data->maximum_latency_hiding_with_cursor[k], vbios->nbp_state_change_latency), data->dmif_burst_time[i][j]), data->dram_speed_change_line_source_transfer_time[k][i][j]), data->mcifwr_burst_time[i][j]), data->active_time[k]))));
1414 if ((bw_ltn(data->dispclk_required_for_dram_speed_change_pipe[i][j], vbios->high_voltage_max_dispclk))) {
1438 data->v_blank_dram_speed_change_margin[k] = bw_sub(bw_sub(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[k], bw_sub(bw_div(data->src_height[k], data->v_scale_ratio[k]), bw_int_to_fixed(4)))), data->h_total[k]), data->pixel_rate[k]), vbios->nbp_state_change_latency), data->dmif_burst_time[low][s_low]), data->dram_speed_change_line_source_transfer_time[k][low][s_low]);
1442 data->v_blank_dram_speed_change_margin[k] = bw_sub(bw_sub(bw_sub(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[k], bw_sub(bw_div(data->src_height[k], data->v_scale_ratio[k]), bw_int_to_fixed(4)))), data->h_total[k]), data->pixel_rate[k]), vbios->nbp_state_change_latency), data->dmif_burst_time[low][s_low]), data->mcifwr_burst_time[low][s_low]), data->dram_speed_change_line_source_transfer_time[k][low][s_low]);
1466 if (number_of_displays_enabled_with_margin > 0 && (number_of_displays_enabled_with_margin + number_of_aligned_displays_with_no_margin) == number_of_displays_enabled && bw_mtn(data->min_dram_speed_change_margin[high][s_high], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[high][s_high], bw_int_to_fixed(9999)) && bw_ltn(data->dispclk_required_for_dram_speed_change[high][s_high], vbios->high_voltage_max_dispclk)) {
1524 data->chunk_request_delay = bw_fixed_to_int(bw_div(bw_int_to_fixed(512), vbios->high_voltage_max_dispclk));
1528 data->display_writes_time_for_data_transfer = bw_sub(data->min_mcifwr_size_in_time, vbios->mcifwrmc_urgent_latency);
1537 data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
1539 else if (bw_mtn(vbios->dmifmc_urgent_latency, data->required_dmifmc_urgent_latency_for_page_close_open) || bw_mtn(vbios->mcifwrmc_urgent_latency, data->required_mcifmcwr_urgent_latency)) {
1543 data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
1547 if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation, 100),yclk[low]),bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits),bw_int_to_fixed(8))),bw_int_to_fixed(vbios->number_of_dram_channels)))
1548 && bw_ltn(bw_mul(data->required_dram_bandwidth_gbyte_per_second, bw_int_to_fixed(1000)), bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[low]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels))) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[low][s_high], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[low][s_high], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[low][s_high], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[low][s_high], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[low][s_high], vbios->high_voltage_max_dispclk) && data->num_displays_with_margin[low][s_high] == number_of_displays_enabled_with_margin))) {
1549 yclk_message = bw_fixed_to_int(vbios->low_yclk);
1551 data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[low]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
1553 else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation, 100),yclk[mid]),bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits),bw_int_to_fixed(8))),bw_int_to_fixed(vbios->number_of_dram_channels)))
1554 && bw_ltn(bw_mul(data->required_dram_bandwidth_gbyte_per_second, bw_int_to_fixed(1000)), bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[mid]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels))) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[mid][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[mid][s_high], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[mid][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[mid][s_high], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[mid][s_high], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[mid][s_high], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[mid][s_high], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[mid][s_high], vbios->high_voltage_max_dispclk) && data->num_displays_with_margin[mid][s_high] == number_of_displays_enabled_with_margin))) {
1555 yclk_message = bw_fixed_to_int(vbios->mid_yclk);
1557 data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[mid]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
1559 else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation, 100),yclk[high]),bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits),bw_int_to_fixed(8))),bw_int_to_fixed(vbios->number_of_dram_channels)))
1560 && bw_ltn(bw_mul(data->required_dram_bandwidth_gbyte_per_second, bw_int_to_fixed(1000)), bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels)))) {
1561 yclk_message = bw_fixed_to_int(vbios->high_yclk);
1563 data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
1568 data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
1576 data->dmif_required_sclk = bw_div(bw_div(data->total_display_reads_required_data, data->display_reads_time_for_data_transfer), (bw_mul(vbios->data_return_bus_width, bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100))));
1577 data->mcifwr_required_sclk = bw_div(bw_div(data->total_display_writes_required_data, data->display_writes_time_for_data_transfer), vbios->data_return_bus_width);
1583 else if (bw_mtn(vbios->dmifmc_urgent_latency, data->required_dmifmc_urgent_latency_for_page_close_open) || bw_mtn(vbios->mcifwrmc_urgent_latency, data->required_mcifmcwr_urgent_latency)) {
1590 if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[low]),vbios->data_return_bus_width))
1591 && bw_ltn(data->required_sclk, sclk[s_low]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_low], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_low], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_low], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_low], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_low], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_low], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_low], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_low], vbios->low_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_low] == number_of_displays_enabled_with_margin))) {
1594 data->required_sclk = vbios->low_sclk;
1596 else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[mid]),vbios->data_return_bus_width))
1597 && bw_ltn(data->required_sclk, sclk[s_mid1]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid1], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid1], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid1], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid1], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid1], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid1], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid1], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid1], vbios->mid_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid1] == number_of_displays_enabled_with_margin))) {
1600 data->required_sclk = vbios->mid1_sclk;
1602 else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid2]),vbios->data_return_bus_width))
1603 && bw_ltn(data->required_sclk, sclk[s_mid2]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid2], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid2], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid2], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid2], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid2], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid2], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid2], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid2], vbios->mid_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid2] == number_of_displays_enabled_with_margin))) {
1606 data->required_sclk = vbios->mid2_sclk;
1608 else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid3]),vbios->data_return_bus_width))
1609 && bw_ltn(data->required_sclk, sclk[s_mid3]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid3], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid3], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid3], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid3], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid3], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid3], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid3], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid3], vbios->mid_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid3] == number_of_displays_enabled_with_margin))) {
1612 data->required_sclk = vbios->mid3_sclk;
1614 else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid4]),vbios->data_return_bus_width))
1615 && bw_ltn(data->required_sclk, sclk[s_mid4]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid4], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid4], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid4], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid4], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid4], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid4], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid4], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid4], vbios->mid_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid4] == number_of_displays_enabled_with_margin))) {
1618 data->required_sclk = vbios->mid4_sclk;
1620 else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid5]),vbios->data_return_bus_width))
1621 && bw_ltn(data->required_sclk, sclk[s_mid5]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid5], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid5], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid5], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid5], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid5], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid5], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid5], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid5], vbios->mid_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid5] == number_of_displays_enabled_with_margin))) {
1624 data->required_sclk = vbios->mid5_sclk;
1626 else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid6]),vbios->data_return_bus_width))
1627 && bw_ltn(data->required_sclk, sclk[s_mid6]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid6], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid6], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid6], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid6], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid6], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid6], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid6], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid6], vbios->high_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid6] == number_of_displays_enabled_with_margin))) {
1630 data->required_sclk = vbios->mid6_sclk;
1632 else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_high]),vbios->data_return_bus_width))
1636 data->required_sclk = vbios->high_sclk;
1638 else if (bw_meq(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_high]),vbios->data_return_bus_width))
1642 data->required_sclk = vbios->high_sclk;
1664 data->downspread_factor = bw_add(bw_int_to_fixed(1), bw_div(vbios->down_spread_percentage, bw_int_to_fixed(100)));
1752 if (bw_ltn(data->total_dispclk_required_with_ramping_with_request_bandwidth, vbios->high_voltage_max_dispclk)) {
1755 else if (bw_ltn(data->total_dispclk_required_without_ramping_with_request_bandwidth, vbios->high_voltage_max_dispclk)) {
1756 data->dispclk = vbios->high_voltage_max_dispclk;
1772 else if (bw_equ(bw_int_to_fixed(yclk_message), vbios->low_yclk) && sclk_message == bw_def_low && bw_ltn(data->dispclk, vbios->low_voltage_max_dispclk)) {
1775 else if ((bw_equ(bw_int_to_fixed(yclk_message), vbios->low_yclk) || bw_equ(bw_int_to_fixed(yclk_message), vbios->mid_yclk)) && (sclk_message == bw_def_low || sclk_message == bw_def_mid) && bw_ltn(data->dispclk, vbios->mid_voltage_max_dispclk)) {
1778 else if ((bw_equ(bw_int_to_fixed(yclk_message), vbios->low_yclk) || bw_equ(bw_int_to_fixed(yclk_message), vbios->mid_yclk) || bw_equ(bw_int_to_fixed(yclk_message), vbios->high_yclk)) && (sclk_message == bw_def_low || sclk_message == bw_def_mid || sclk_message == bw_def_high) && bw_leq(data->dispclk, vbios->high_voltage_max_dispclk)) {
1790 data->max_phyclk = vbios->low_voltage_max_phyclk;
1793 data->max_phyclk = vbios->mid_voltage_max_phyclk;
1796 data->max_phyclk = vbios->high_voltage_max_phyclk;
1801 if (data->enable[k] && bw_mtn(vbios->blackout_duration, bw_int_to_fixed(0)) && data->cpup_state_change_enable == bw_def_yes) {
1804 if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level])))))) {
1805 data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_div((bw_add(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), vbios->blackout_duration), bw_sub(bw_div(bw_mul(bw_mul(bw_mul((bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level])), data->dispclk), bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), data->adjusted_data_buffer_size[k]))), (bw_sub(bw_div(bw_mul(bw_mul(data->dispclk, bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k])))));
1809 data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->mcifwr_burst_time[data->y_clk_level][data->sclk_level]));
1810 if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->mcifwr_burst_time[data->y_clk_level][data->sclk_level])))))) {
1811 data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_div((bw_add(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), vbios->blackout_duration), bw_sub(bw_div(bw_mul(bw_mul(bw_mul((bw_add(bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level]), data->mcifwr_burst_time[data->y_clk_level][data->sclk_level])), data->dispclk), bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), data->adjusted_data_buffer_size[k]))), (bw_sub(bw_div(bw_mul(bw_mul(data->dispclk, bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k])))));
1867 data->urgent_watermark[i] = bw_add(bw_add(bw_add(bw_add(bw_add(data->total_dmifmc_urgent_latency, data->dmif_burst_time[data->y_clk_level][data->sclk_level]), bw_max2(data->line_source_pixels_transfer_time, data->line_source_transfer_time[i][data->y_clk_level][data->sclk_level])), vbios->blackout_duration), data->chunk_request_time), data->cursor_request_time);
1868 data->stutter_exit_watermark[i] = bw_add(bw_sub(vbios->stutter_self_refresh_exit_latency, data->total_dmifmc_urgent_latency), data->urgent_watermark[i]);
1869 data->stutter_entry_watermark[i] = bw_add(bw_sub(bw_add(vbios->stutter_self_refresh_exit_latency, vbios->stutter_self_refresh_entry_latency), data->total_dmifmc_urgent_latency), data->urgent_watermark[i]);
1872 data->nbp_state_change_watermark[i] = bw_add(bw_add(vbios->nbp_state_change_latency, data->dmif_burst_time[data->y_clk_level][data->sclk_level]), bw_max2(data->line_source_pixels_transfer_time, data->dram_speed_change_line_source_transfer_time[i][data->y_clk_level][data->sclk_level]));
1880 data->urgent_watermark[i] = bw_add(bw_add(bw_add(bw_add(bw_add(vbios->mcifwrmc_urgent_latency, data->mcifwr_burst_time[data->y_clk_level][data->sclk_level]), bw_max2(data->line_source_pixels_transfer_time, data->line_source_transfer_time[i][data->y_clk_level][data->sclk_level])), vbios->blackout_duration), data->chunk_request_time), data->cursor_request_time);
1884 data->nbp_state_change_watermark[i] = bw_add(bw_add(vbios->nbp_state_change_latency, data->mcifwr_burst_time[data->y_clk_level][data->sclk_level]), bw_max2(data->line_source_pixels_transfer_time, data->dram_speed_change_line_source_transfer_time[i][data->y_clk_level][data->sclk_level]));
1955 data->stutter_burst_time = bw_div(bw_int_to_fixed(data->total_stutter_dmif_buffer_size), bw_mul(sclk[data->sclk_level], vbios->data_return_bus_width));
1957 data->total_stutter_cycle_duration = bw_add(bw_add(data->min_stutter_refresh_duration, vbios->stutter_self_refresh_exit_latency), data->stutter_burst_time);
1967 data->stutter_efficiency = bw_max2(bw_int_to_fixed(0), bw_mul((bw_sub(bw_int_to_fixed(1), (bw_div(bw_mul((bw_add(vbios->stutter_self_refresh_exit_latency, data->stutter_burst_time)), bw_int_to_fixed(data->num_stutter_bursts)), bw_frc_to_fixed(166666667, 10000))))), bw_int_to_fixed(100)));
1986 data->latency_for_non_mcifwr_clients = bw_add(vbios->mcifwrmc_urgent_latency, dceip->mcifwr_all_surfaces_burst_time);
1999 data->nbp_state_dram_speed_change_latency_supported = bw_min2(data->nbp_state_dram_speed_change_latency_supported, bw_add(bw_sub(data->maximum_latency_hiding_with_cursor[i], data->nbp_state_change_watermark[i]), vbios->nbp_state_change_latency));
2000 data->v_blank_nbp_state_dram_speed_change_latency_supported = bw_min2(data->v_blank_nbp_state_dram_speed_change_latency_supported, bw_add(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[i], bw_sub(bw_div(data->src_height[i], data->v_scale_ratio[i]), bw_int_to_fixed(4)))), data->h_total[i]), data->pixel_rate[i]), data->nbp_state_change_watermark[i]), vbios->nbp_state_change_latency));
2007 data->dmif_required_sclk_for_urgent_latency[i] = bw_div(bw_div(data->total_display_reads_required_data, data->display_reads_time_for_data_transfer_and_urgent_latency), (bw_mul(vbios->data_return_bus_width, bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100))));
2050 struct bw_calcs_vbios *vbios;
2058 vbios = kzalloc(sizeof(*vbios), GFP_KERNEL);
2059 if (!vbios) {
2068 vbios->memory_type = bw_def_gddr5;
2069 vbios->dram_channel_width_in_bits = 64;
2070 vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits;
2071 vbios->number_of_dram_banks = 8;
2072 vbios->high_yclk = bw_int_to_fixed(1600);
2073 vbios->mid_yclk = bw_int_to_fixed(1600);
2074 vbios->low_yclk = bw_frc_to_fixed(66666, 100);
2075 vbios->low_sclk = bw_int_to_fixed(200);
2076 vbios->mid1_sclk = bw_int_to_fixed(300);
2077 vbios->mid2_sclk = bw_int_to_fixed(300);
2078 vbios->mid3_sclk = bw_int_to_fixed(300);
2079 vbios->mid4_sclk = bw_int_to_fixed(300);
2080 vbios->mid5_sclk = bw_int_to_fixed(300);
2081 vbios->mid6_sclk = bw_int_to_fixed(300);
2082 vbios->high_sclk = bw_frc_to_fixed(62609, 100);
2083 vbios->low_voltage_max_dispclk = bw_int_to_fixed(352);
2084 vbios->mid_voltage_max_dispclk = bw_int_to_fixed(467);
2085 vbios->high_voltage_max_dispclk = bw_int_to_fixed(643);
2086 vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);
2087 vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);
2088 vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);
2089 vbios->data_return_bus_width = bw_int_to_fixed(32);
2090 vbios->trc = bw_int_to_fixed(50);
2091 vbios->dmifmc_urgent_latency = bw_int_to_fixed(4);
2092 vbios->stutter_self_refresh_exit_latency = bw_frc_to_fixed(153, 10);
2093 vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0);
2094 vbios->nbp_state_change_latency = bw_frc_to_fixed(19649, 1000);
2095 vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);
2096 vbios->scatter_gather_enable = true;
2097 vbios->down_spread_percentage = bw_frc_to_fixed(5, 10);
2098 vbios->cursor_width = 32;
2099 vbios->average_compression_rate = 4;
2100 vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256;
2101 vbios->blackout_duration = bw_int_to_fixed(0); /* us */
2102 vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);
2184 vbios->memory_type = bw_def_gddr5;
2185 vbios->dram_channel_width_in_bits = 32;
2186 vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits;
2187 vbios->number_of_dram_banks = 8;
2188 vbios->high_yclk = bw_int_to_fixed(6000);
2189 vbios->mid_yclk = bw_int_to_fixed(3200);
2190 vbios->low_yclk = bw_int_to_fixed(1000);
2191 vbios->low_sclk = bw_int_to_fixed(300);
2192 vbios->mid1_sclk = bw_int_to_fixed(400);
2193 vbios->mid2_sclk = bw_int_to_fixed(500);
2194 vbios->mid3_sclk = bw_int_to_fixed(600);
2195 vbios->mid4_sclk = bw_int_to_fixed(700);
2196 vbios->mid5_sclk = bw_int_to_fixed(800);
2197 vbios->mid6_sclk = bw_int_to_fixed(974);
2198 vbios->high_sclk = bw_int_to_fixed(1154);
2199 vbios->low_voltage_max_dispclk = bw_int_to_fixed(459);
2200 vbios->mid_voltage_max_dispclk = bw_int_to_fixed(654);
2201 vbios->high_voltage_max_dispclk = bw_int_to_fixed(1108);
2202 vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);
2203 vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);
2204 vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);
2205 vbios->data_return_bus_width = bw_int_to_fixed(32);
2206 vbios->trc = bw_int_to_fixed(48);
2207 vbios->dmifmc_urgent_latency = bw_int_to_fixed(3);
2208 vbios->stutter_self_refresh_exit_latency = bw_int_to_fixed(5);
2209 vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0);
2210 vbios->nbp_state_change_latency = bw_int_to_fixed(45);
2211 vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);
2212 vbios->scatter_gather_enable = true;
2213 vbios->down_spread_percentage = bw_frc_to_fixed(5, 10);
2214 vbios->cursor_width = 32;
2215 vbios->average_compression_rate = 4;
2216 vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256;
2217 vbios->blackout_duration = bw_int_to_fixed(0); /* us */
2218 vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);
2297 vbios->memory_type = bw_def_gddr5;
2298 vbios->dram_channel_width_in_bits = 32;
2299 vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits;
2300 vbios->number_of_dram_banks = 8;
2301 vbios->high_yclk = bw_int_to_fixed(6000);
2302 vbios->mid_yclk = bw_int_to_fixed(3200);
2303 vbios->low_yclk = bw_int_to_fixed(1000);
2304 vbios->low_sclk = bw_int_to_fixed(300);
2305 vbios->mid1_sclk = bw_int_to_fixed(400);
2306 vbios->mid2_sclk = bw_int_to_fixed(500);
2307 vbios->mid3_sclk = bw_int_to_fixed(600);
2308 vbios->mid4_sclk = bw_int_to_fixed(700);
2309 vbios->mid5_sclk = bw_int_to_fixed(800);
2310 vbios->mid6_sclk = bw_int_to_fixed(974);
2311 vbios->high_sclk = bw_int_to_fixed(1154);
2312 vbios->low_voltage_max_dispclk = bw_int_to_fixed(459);
2313 vbios->mid_voltage_max_dispclk = bw_int_to_fixed(654);
2314 vbios->high_voltage_max_dispclk = bw_int_to_fixed(1108);
2315 vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);
2316 vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);
2317 vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);
2318 vbios->data_return_bus_width = bw_int_to_fixed(32);
2319 vbios->trc = bw_int_to_fixed(48);
2320 if (vbios->number_of_dram_channels == 2) // 64-bit
2321 vbios->dmifmc_urgent_latency = bw_int_to_fixed(4);
2323 vbios->dmifmc_urgent_latency = bw_int_to_fixed(3);
2324 vbios->stutter_self_refresh_exit_latency = bw_int_to_fixed(5);
2325 vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0);
2326 vbios->nbp_state_change_latency = bw_int_to_fixed(45);
2327 vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);
2328 vbios->scatter_gather_enable = true;
2329 vbios->down_spread_percentage = bw_frc_to_fixed(5, 10);
2330 vbios->cursor_width = 32;
2331 vbios->average_compression_rate = 4;
2332 vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256;
2333 vbios->blackout_duration = bw_int_to_fixed(0); /* us */
2334 vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);
2413 vbios->memory_type = bw_def_gddr5;
2414 vbios->dram_channel_width_in_bits = 32;
2415 vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits;
2416 vbios->number_of_dram_banks = 8;
2417 vbios->high_yclk = bw_int_to_fixed(6000);
2418 vbios->mid_yclk = bw_int_to_fixed(3200);
2419 vbios->low_yclk = bw_int_to_fixed(1000);
2420 vbios->low_sclk = bw_int_to_fixed(678);
2421 vbios->mid1_sclk = bw_int_to_fixed(864);
2422 vbios->mid2_sclk = bw_int_to_fixed(900);
2423 vbios->mid3_sclk = bw_int_to_fixed(920);
2424 vbios->mid4_sclk = bw_int_to_fixed(940);
2425 vbios->mid5_sclk = bw_int_to_fixed(960);
2426 vbios->mid6_sclk = bw_int_to_fixed(980);
2427 vbios->high_sclk = bw_int_to_fixed(1049);
2428 vbios->low_voltage_max_dispclk = bw_int_to_fixed(459);
2429 vbios->mid_voltage_max_dispclk = bw_int_to_fixed(654);
2430 vbios->high_voltage_max_dispclk = bw_int_to_fixed(1108);
2431 vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);
2432 vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);
2433 vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);
2434 vbios->data_return_bus_width = bw_int_to_fixed(32);
2435 vbios->trc = bw_int_to_fixed(48);
2436 if (vbios->number_of_dram_channels == 2) // 64-bit
2437 vbios->dmifmc_urgent_latency = bw_int_to_fixed(4);
2439 vbios->dmifmc_urgent_latency = bw_int_to_fixed(3);
2440 vbios->stutter_self_refresh_exit_latency = bw_int_to_fixed(5);
2441 vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0);
2442 vbios->nbp_state_change_latency = bw_int_to_fixed(250);
2443 vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);
2444 vbios->scatter_gather_enable = false;
2445 vbios->down_spread_percentage = bw_frc_to_fixed(5, 10);
2446 vbios->cursor_width = 32;
2447 vbios->average_compression_rate = 4;
2448 vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256;
2449 vbios->blackout_duration = bw_int_to_fixed(0); /* us */
2450 vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);
2529 vbios->memory_type = bw_def_gddr5;
2530 vbios->dram_channel_width_in_bits = 64;
2531 vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits;
2532 vbios->number_of_dram_banks = 8;
2533 vbios->high_yclk = bw_int_to_fixed(1866);
2534 vbios->mid_yclk = bw_int_to_fixed(1866);
2535 vbios->low_yclk = bw_int_to_fixed(1333);
2536 vbios->low_sclk = bw_int_to_fixed(200);
2537 vbios->mid1_sclk = bw_int_to_fixed(600);
2538 vbios->mid2_sclk = bw_int_to_fixed(600);
2539 vbios->mid3_sclk = bw_int_to_fixed(600);
2540 vbios->mid4_sclk = bw_int_to_fixed(600);
2541 vbios->mid5_sclk = bw_int_to_fixed(600);
2542 vbios->mid6_sclk = bw_int_to_fixed(600);
2543 vbios->high_sclk = bw_int_to_fixed(800);
2544 vbios->low_voltage_max_dispclk = bw_int_to_fixed(352);
2545 vbios->mid_voltage_max_dispclk = bw_int_to_fixed(467);
2546 vbios->high_voltage_max_dispclk = bw_int_to_fixed(643);
2547 vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);
2548 vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);
2549 vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);
2550 vbios->data_return_bus_width = bw_int_to_fixed(32);
2551 vbios->trc = bw_int_to_fixed(50);
2552 vbios->dmifmc_urgent_latency = bw_int_to_fixed(4);
2553 vbios->stutter_self_refresh_exit_latency = bw_frc_to_fixed(158, 10);
2554 vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0);
2555 vbios->nbp_state_change_latency = bw_frc_to_fixed(2008, 100);
2556 vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);
2557 vbios->scatter_gather_enable = true;
2558 vbios->down_spread_percentage = bw_frc_to_fixed(5, 10);
2559 vbios->cursor_width = 32;
2560 vbios->average_compression_rate = 4;
2561 vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256;
2562 vbios->blackout_duration = bw_int_to_fixed(0); /* us */
2563 vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);
2642 vbios->memory_type = bw_def_hbm;
2643 vbios->dram_channel_width_in_bits = 128;
2644 vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits;
2645 vbios->number_of_dram_banks = 16;
2646 vbios->high_yclk = bw_int_to_fixed(2400);
2647 vbios->mid_yclk = bw_int_to_fixed(1700);
2648 vbios->low_yclk = bw_int_to_fixed(1000);
2649 vbios->low_sclk = bw_int_to_fixed(300);
2650 vbios->mid1_sclk = bw_int_to_fixed(350);
2651 vbios->mid2_sclk = bw_int_to_fixed(400);
2652 vbios->mid3_sclk = bw_int_to_fixed(500);
2653 vbios->mid4_sclk = bw_int_to_fixed(600);
2654 vbios->mid5_sclk = bw_int_to_fixed(700);
2655 vbios->mid6_sclk = bw_int_to_fixed(760);
2656 vbios->high_sclk = bw_int_to_fixed(776);
2657 vbios->low_voltage_max_dispclk = bw_int_to_fixed(460);
2658 vbios->mid_voltage_max_dispclk = bw_int_to_fixed(670);
2659 vbios->high_voltage_max_dispclk = bw_int_to_fixed(1133);
2660 vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);
2661 vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);
2662 vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);
2663 vbios->data_return_bus_width = bw_int_to_fixed(32);
2664 vbios->trc = bw_int_to_fixed(48);
2665 vbios->dmifmc_urgent_latency = bw_int_to_fixed(3);
2666 vbios->stutter_self_refresh_exit_latency = bw_frc_to_fixed(75, 10);
2667 vbios->stutter_self_refresh_entry_latency = bw_frc_to_fixed(19, 10);
2668 vbios->nbp_state_change_latency = bw_int_to_fixed(39);
2669 vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);
2670 vbios->scatter_gather_enable = false;
2671 vbios->down_spread_percentage = bw_frc_to_fixed(5, 10);
2672 vbios->cursor_width = 32;
2673 vbios->average_compression_rate = 4;
2674 vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 8;
2675 vbios->blackout_duration = bw_int_to_fixed(0); /* us */
2676 vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);
2758 *bw_vbios = *vbios;
2761 kfree(vbios);
2769 const struct bw_calcs_vbios *vbios,
2774 int_max_clk = bw_fixed_to_int(vbios->high_voltage_max_dispclk);
2779 int_max_clk = bw_fixed_to_int(vbios->high_sclk);
3045 const struct bw_calcs_vbios *vbios,
3064 struct bw_fixed high_sclk = vbios->high_sclk;
3065 struct bw_fixed mid1_sclk = vbios->mid1_sclk;
3066 struct bw_fixed mid2_sclk = vbios->mid2_sclk;
3067 struct bw_fixed mid3_sclk = vbios->mid3_sclk;
3068 struct bw_fixed mid4_sclk = vbios->mid4_sclk;
3069 struct bw_fixed mid5_sclk = vbios->mid5_sclk;
3070 struct bw_fixed mid6_sclk = vbios->mid6_sclk;
3071 struct bw_fixed low_sclk = vbios->low_sclk;
3072 struct bw_fixed high_yclk = vbios->high_yclk;
3073 struct bw_fixed mid_yclk = vbios->mid_yclk;
3074 struct bw_fixed low_yclk = vbios->low_yclk;
3078 print_bw_calcs_vbios(ctx, vbios);
3081 calculate_bandwidth(dceip, vbios, data);
3232 ((struct bw_calcs_vbios *)vbios)->low_sclk = mid3_sclk;
3233 ((struct bw_calcs_vbios *)vbios)->mid1_sclk = mid3_sclk;
3234 ((struct bw_calcs_vbios *)vbios)->mid2_sclk = mid3_sclk;
3235 calculate_bandwidth(dceip, vbios, data);
3352 ((struct bw_calcs_vbios *)vbios)->low_sclk = low_sclk;
3353 ((struct bw_calcs_vbios *)vbios)->mid1_sclk = mid1_sclk;
3354 ((struct bw_calcs_vbios *)vbios)->mid2_sclk = mid2_sclk;
3355 ((struct bw_calcs_vbios *)vbios)->low_yclk = mid_yclk;
3356 calculate_bandwidth(dceip, vbios, data);
3471 ((struct bw_calcs_vbios *)vbios)->low_yclk = high_yclk;
3472 ((struct bw_calcs_vbios *)vbios)->mid_yclk = high_yclk;
3473 ((struct bw_calcs_vbios *)vbios)->low_sclk = high_sclk;
3474 ((struct bw_calcs_vbios *)vbios)->mid1_sclk = high_sclk;
3475 ((struct bw_calcs_vbios *)vbios)->mid2_sclk = high_sclk;
3476 ((struct bw_calcs_vbios *)vbios)->mid3_sclk = high_sclk;
3477 ((struct bw_calcs_vbios *)vbios)->mid4_sclk = high_sclk;
3478 ((struct bw_calcs_vbios *)vbios)->mid5_sclk = high_sclk;
3479 ((struct bw_calcs_vbios *)vbios)->mid6_sclk = high_sclk;
3481 ((struct bw_calcs_vbios *)vbios)->low_yclk = mid_yclk;
3482 ((struct bw_calcs_vbios *)vbios)->low_sclk = mid3_sclk;
3483 ((struct bw_calcs_vbios *)vbios)->mid1_sclk = mid3_sclk;
3484 ((struct bw_calcs_vbios *)vbios)->mid2_sclk = mid3_sclk;
3487 calculate_bandwidth(dceip, vbios, data);
3601 ((struct bw_calcs_vbios *)vbios)->low_yclk = low_yclk;
3602 ((struct bw_calcs_vbios *)vbios)->mid_yclk = mid_yclk;
3603 ((struct bw_calcs_vbios *)vbios)->low_sclk = low_sclk;
3604 ((struct bw_calcs_vbios *)vbios)->mid1_sclk = mid1_sclk;
3605 ((struct bw_calcs_vbios *)vbios)->mid2_sclk = mid2_sclk;
3606 ((struct bw_calcs_vbios *)vbios)->mid3_sclk = mid3_sclk;
3607 ((struct bw_calcs_vbios *)vbios)->mid4_sclk = mid4_sclk;
3608 ((struct bw_calcs_vbios *)vbios)->mid5_sclk = mid5_sclk;
3609 ((struct bw_calcs_vbios *)vbios)->mid6_sclk = mid6_sclk;
3610 ((struct bw_calcs_vbios *)vbios)->high_sclk = high_sclk;
3622 return is_display_configuration_supported(vbios, calcs_output);