Lines Matching refs:inst
183 #define CLK_SRI(reg_name, block, inst)\
184 .reg_name = CLK_BASE(mm ## block ## _ ## inst ## _ ## reg_name ## _BASE_IDX) + \
185 mm ## block ## _ ## inst ## _ ## reg_name
748 uint32_t inst)
756 if (dpp3_construct(dpp, ctx, inst,
757 &dpp_regs[inst], &tf_shift, &tf_mask))
766 struct dc_context *ctx, uint32_t inst)
776 dcn20_opp_construct(opp, ctx, inst,
777 &opp_regs[inst], &opp_shift, &opp_mask);
783 uint32_t inst)
791 dce110_aux_engine_construct(aux_engine, ctx, inst,
793 &aux_engine_regs[inst],
822 uint32_t inst)
830 dcn2_i2c_hw_construct(dce_i2c_hw, ctx, inst,
831 &i2c_hw_regs[inst], &i2c_shifts, &i2c_masks);
896 tgn10->base.inst = instance;
952 &panel_cntl_regs[init_data->inst],
969 struct dc_context *ctx, unsigned int inst)
971 return dce_audio_create(ctx, inst,
972 &audio_regs[inst], &audio_shift, &audio_mask);
977 uint32_t inst)
984 vpg3_construct(vpg3, ctx, inst,
985 &vpg_regs[inst],
994 uint32_t inst)
1001 afmt3_construct(afmt3, ctx, inst,
1002 &afmt_regs[inst],
1196 uint32_t inst)
1204 if (hubp3_construct(hubp2, ctx, inst,
1205 &hubp_regs[inst], &hubp_shift, &hubp_mask))
1264 struct dc_context *ctx, uint32_t inst)
1274 dsc2_construct(dsc, ctx, inst, &dsc_regs[inst], &dsc_shift, &dsc_mask);
1539 sec_pipe->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst;