Lines Matching refs:dm_write_reg
53 dm_write_reg(
74 dm_write_reg(
88 dm_write_reg(
110 dm_write_reg(
124 dm_write_reg(
160 dm_write_reg(mem_input110->base.ctx,
202 dm_write_reg(
224 dm_write_reg(
255 dm_write_reg(
263 dm_write_reg(
271 dm_write_reg(
279 dm_write_reg(
287 dm_write_reg(
295 dm_write_reg(
304 dm_write_reg(
313 dm_write_reg(
322 dm_write_reg(
331 dm_write_reg(
356 dm_write_reg(
419 dm_write_reg(
434 dm_write_reg(
466 dm_write_reg(
613 dm_write_reg(mem_input110->base.ctx, mmUNP_PIPE_OUTSTANDING_REQUEST_LIMIT, value);
619 dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL, value);
624 dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL, value);
630 dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL_C, value);
635 dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL_C, value);
672 dm_write_reg(ctx, wm_addr, wm_mask_cntl);
687 dm_write_reg(ctx, urgency_addr, urgency_cntl);
695 dm_write_reg(ctx, wm_addr, wm_mask_cntl);
709 dm_write_reg(ctx, urgency_addr, urgency_cntl);
755 dm_write_reg(ctx, wm_addr, wm_mask_cntl);
781 dm_write_reg(ctx, stutter_addr, stutter_cntl);
789 dm_write_reg(ctx, wm_addr, wm_mask_cntl);
797 dm_write_reg(ctx, stutter_addr, stutter_cntl);
837 dm_write_reg(ctx, wm_mask_ctrl_addr, value);
856 dm_write_reg(ctx, nbp_pstate_ctrl_addr, value);
865 dm_write_reg(ctx, nbp_pstate_ctrl_addr, value);
874 dm_write_reg(ctx, wm_mask_ctrl_addr, value);
892 dm_write_reg(ctx, nbp_pstate_ctrl_addr, value);
901 dm_write_reg(ctx, nbp_pstate_ctrl_addr, value);
987 dm_write_reg(mi->ctx, addr, value);
997 dm_write_reg(mi->ctx, addr, value);
1001 dm_write_reg(mi->ctx, addr, value);
1005 dm_write_reg(mi->ctx, addr, value);