Lines Matching defs:params
489 block_sequence[*num_steps].params.subvp_pipe_control_lock_fast_params.dc = dc;
490 block_sequence[*num_steps].params.subvp_pipe_control_lock_fast_params.lock = true;
491 block_sequence[*num_steps].params.subvp_pipe_control_lock_fast_params.pipe_ctx = pipe_ctx;
496 block_sequence[*num_steps].params.pipe_control_lock_params.dc = dc;
497 block_sequence[*num_steps].params.pipe_control_lock_params.lock = true;
498 block_sequence[*num_steps].params.pipe_control_lock_params.pipe_ctx = pipe_ctx;
504 block_sequence[*num_steps].params.send_dmcub_cmd_params.ctx = dc->ctx;
505 block_sequence[*num_steps].params.send_dmcub_cmd_params.cmd = &(dc_dmub_cmd[i].dmub_cmd);
506 block_sequence[*num_steps].params.send_dmcub_cmd_params.wait_type = dc_dmub_cmd[i].wait_type;
516 block_sequence[*num_steps].params.set_flip_control_gsl_params.pipe_ctx = current_mpc_pipe;
517 block_sequence[*num_steps].params.set_flip_control_gsl_params.flip_immediate = current_mpc_pipe->plane_state->flip_immediate;
522 block_sequence[*num_steps].params.program_triplebuffer_params.dc = dc;
523 block_sequence[*num_steps].params.program_triplebuffer_params.pipe_ctx = current_mpc_pipe;
524 block_sequence[*num_steps].params.program_triplebuffer_params.enableTripleBuffer = current_mpc_pipe->plane_state->triplebuffer_flips;
529 block_sequence[*num_steps].params.update_plane_addr_params.dc = dc;
530 block_sequence[*num_steps].params.update_plane_addr_params.pipe_ctx = current_mpc_pipe;
536 block_sequence[*num_steps].params.set_input_transfer_func_params.dc = dc;
537 block_sequence[*num_steps].params.set_input_transfer_func_params.pipe_ctx = current_mpc_pipe;
538 block_sequence[*num_steps].params.set_input_transfer_func_params.plane_state = current_mpc_pipe->plane_state;
544 block_sequence[*num_steps].params.program_gamut_remap_params.pipe_ctx = current_mpc_pipe;
549 block_sequence[*num_steps].params.setup_dpp_params.pipe_ctx = current_mpc_pipe;
554 block_sequence[*num_steps].params.program_bias_and_scale_params.pipe_ctx = current_mpc_pipe;
559 block_sequence[*num_steps].params.set_output_transfer_func_params.dc = dc;
560 block_sequence[*num_steps].params.set_output_transfer_func_params.pipe_ctx = current_mpc_pipe;
561 block_sequence[*num_steps].params.set_output_transfer_func_params.stream = current_mpc_pipe->stream;
567 block_sequence[*num_steps].params.power_on_mpc_mem_pwr_params.mpc = dc->res_pool->mpc;
568 block_sequence[*num_steps].params.power_on_mpc_mem_pwr_params.mpcc_id = current_mpc_pipe->plane_res.hubp->inst;
569 block_sequence[*num_steps].params.power_on_mpc_mem_pwr_params.power_on = true;
574 block_sequence[*num_steps].params.set_output_csc_params.mpc = dc->res_pool->mpc;
575 block_sequence[*num_steps].params.set_output_csc_params.opp_id = current_mpc_pipe->stream_res.opp->inst;
576 block_sequence[*num_steps].params.set_output_csc_params.regval = current_mpc_pipe->stream->csc_color_matrix.matrix;
577 block_sequence[*num_steps].params.set_output_csc_params.ocsc_mode = MPC_OUTPUT_CSC_COEF_A;
581 block_sequence[*num_steps].params.set_ocsc_default_params.mpc = dc->res_pool->mpc;
582 block_sequence[*num_steps].params.set_ocsc_default_params.opp_id = current_mpc_pipe->stream_res.opp->inst;
583 block_sequence[*num_steps].params.set_ocsc_default_params.color_space = current_mpc_pipe->stream->output_color_space;
584 block_sequence[*num_steps].params.set_ocsc_default_params.ocsc_mode = MPC_OUTPUT_CSC_COEF_A;
595 block_sequence[*num_steps].params.pipe_control_lock_params.dc = dc;
596 block_sequence[*num_steps].params.pipe_control_lock_params.lock = false;
597 block_sequence[*num_steps].params.pipe_control_lock_params.pipe_ctx = pipe_ctx;
602 block_sequence[*num_steps].params.subvp_pipe_control_lock_fast_params.dc = dc;
603 block_sequence[*num_steps].params.subvp_pipe_control_lock_fast_params.lock = false;
604 block_sequence[*num_steps].params.subvp_pipe_control_lock_fast_params.pipe_ctx = pipe_ctx;
618 block_sequence[*num_steps].params.program_manual_trigger_params.pipe_ctx = current_mpc_pipe;
633 union block_sequence_params *params;
637 params = &(block_sequence[i].params);
641 dc->hwss.subvp_pipe_control_lock_fast(params);
644 dc->hwss.pipe_control_lock(params->pipe_control_lock_params.dc,
645 params->pipe_control_lock_params.pipe_ctx,
646 params->pipe_control_lock_params.lock);
649 dc->hwss.set_flip_control_gsl(params->set_flip_control_gsl_params.pipe_ctx,
650 params->set_flip_control_gsl_params.flip_immediate);
653 dc->hwss.program_triplebuffer(params->program_triplebuffer_params.dc,
654 params->program_triplebuffer_params.pipe_ctx,
655 params->program_triplebuffer_params.enableTripleBuffer);
658 dc->hwss.update_plane_addr(params->update_plane_addr_params.dc,
659 params->update_plane_addr_params.pipe_ctx);
662 hws->funcs.set_input_transfer_func(params->set_input_transfer_func_params.dc,
663 params->set_input_transfer_func_params.pipe_ctx,
664 params->set_input_transfer_func_params.plane_state);
667 dc->hwss.program_gamut_remap(params->program_gamut_remap_params.pipe_ctx);
670 hwss_setup_dpp(params);
673 hwss_program_bias_and_scale(params);
676 hwss_program_manual_trigger(params);
679 hws->funcs.set_output_transfer_func(params->set_output_transfer_func_params.dc,
680 params->set_output_transfer_func_params.pipe_ctx,
681 params->set_output_transfer_func_params.stream);
684 dc->hwss.update_visual_confirm_color(params->update_visual_confirm_params.dc,
685 params->update_visual_confirm_params.pipe_ctx,
686 params->update_visual_confirm_params.mpcc_id);
689 hwss_power_on_mpc_mem_pwr(params);
692 hwss_set_output_csc(params);
695 hwss_set_ocsc_default(params);
698 hwss_send_dmcub_cmd(params);
707 void hwss_send_dmcub_cmd(union block_sequence_params *params)
709 struct dc_context *ctx = params->send_dmcub_cmd_params.ctx;
710 union dmub_rb_cmd *cmd = params->send_dmcub_cmd_params.cmd;
711 enum dm_dmub_wait_type wait_type = params->send_dmcub_cmd_params.wait_type;
716 void hwss_program_manual_trigger(union block_sequence_params *params)
718 struct pipe_ctx *pipe_ctx = params->program_manual_trigger_params.pipe_ctx;
724 void hwss_setup_dpp(union block_sequence_params *params)
726 struct pipe_ctx *pipe_ctx = params->setup_dpp_params.pipe_ctx;
741 void hwss_program_bias_and_scale(union block_sequence_params *params)
743 struct pipe_ctx *pipe_ctx = params->program_bias_and_scale_params.pipe_ctx;
754 void hwss_power_on_mpc_mem_pwr(union block_sequence_params *params)
756 struct mpc *mpc = params->power_on_mpc_mem_pwr_params.mpc;
757 int mpcc_id = params->power_on_mpc_mem_pwr_params.mpcc_id;
758 bool power_on = params->power_on_mpc_mem_pwr_params.power_on;
764 void hwss_set_output_csc(union block_sequence_params *params)
766 struct mpc *mpc = params->set_output_csc_params.mpc;
767 int opp_id = params->set_output_csc_params.opp_id;
768 const uint16_t *matrix = params->set_output_csc_params.regval;
769 enum mpc_output_csc_mode ocsc_mode = params->set_output_csc_params.ocsc_mode;
778 void hwss_set_ocsc_default(union block_sequence_params *params)
780 struct mpc *mpc = params->set_ocsc_default_params.mpc;
781 int opp_id = params->set_ocsc_default_params.opp_id;
782 enum dc_color_space colorspace = params->set_ocsc_default_params.color_space;
783 enum mpc_output_csc_mode ocsc_mode = params->set_ocsc_default_params.ocsc_mode;