amd/amdgpu/mmhub_v3_0.c

156 	WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,
158 	WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,
161 	WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,
163 	WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,
181 	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
182 	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
183 	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
186 	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,
188 	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
194 	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,
196 	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,
200 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,
202 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,
208 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL2, tmp);
228 	WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);
253 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);
258 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp);
270 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, tmp);
275 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp);
279 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL5, tmp);
291 	WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_CNTL, tmp);
302 	WREG32_SOC15(MMHUB, 0,
305 	WREG32_SOC15(MMHUB, 0,
309 	WREG32_SOC15(MMHUB, 0,
311 	WREG32_SOC15(MMHUB, 0,
314 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32,
316 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32,
415 	WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);
420 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);
421 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, 0);
470 	WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL, tmp);
594 		WREG32_SOC15(MMHUB, 0, regMM_ATC_L2_MISC_CG, data);
597 		WREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2, data1);
600 		WREG32_SOC15(MMHUB, 0, regDAGB1_CNTL_MISC2, data2);
617 		WREG32_SOC15(MMHUB, 0, regMM_ATC_L2_MISC_CG, data);