Lines Matching defs:saddr
1568 uint64_t saddr,
1574 if (saddr & AMDGPU_GPU_PAGE_MASK
1579 if (check_add_overflow(saddr, size, &tmp)
1589 lpfn = (saddr + size - 1) >> AMDGPU_GPU_PAGE_SHIFT;
1601 * @saddr: where to map the BO
1615 uint64_t saddr, uint64_t offset,
1624 r = amdgpu_vm_verify_parameters(adev, bo, saddr, offset, size);
1628 saddr /= AMDGPU_GPU_PAGE_SIZE;
1629 eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE;
1631 tmp = amdgpu_vm_it_iter_first(&vm->va, saddr, eaddr);
1635 "0x%010llx-0x%010llx\n", bo, saddr, eaddr,
1644 mapping->start = saddr;
1659 * @saddr: where to map the BO
1674 uint64_t saddr, uint64_t offset,
1682 r = amdgpu_vm_verify_parameters(adev, bo, saddr, offset, size);
1691 r = amdgpu_vm_bo_clear_mappings(adev, bo_va->base.vm, saddr, size);
1697 saddr /= AMDGPU_GPU_PAGE_SIZE;
1698 eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE;
1700 mapping->start = saddr;
1715 * @saddr: where to the BO is mapped
1726 uint64_t saddr)
1732 saddr /= AMDGPU_GPU_PAGE_SIZE;
1735 if (mapping->start == saddr)
1743 if (mapping->start == saddr)
1770 * @saddr: start of the range
1780 uint64_t saddr, uint64_t size)
1787 r = amdgpu_vm_verify_parameters(adev, NULL, saddr, 0, size);
1791 saddr /= AMDGPU_GPU_PAGE_SIZE;
1792 eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE;
1808 tmp = amdgpu_vm_it_iter_first(&vm->va, saddr, eaddr);
1811 if (tmp->start < saddr) {
1813 before->last = saddr - 1;
1834 tmp = amdgpu_vm_it_iter_next(tmp, saddr, eaddr);
1842 if (tmp->start < saddr)
1843 tmp->start = saddr;