amd/amdgpu/amdgpu_i2c.c

47 	struct amdgpu_i2c_bus_rec *rec = &i2c->rec;
53 	if (rec->hw_capable) {
54 		temp = RREG32(rec->mask_clk_reg);
56 		WREG32(rec->mask_clk_reg, temp);
60 	temp = RREG32(rec->a_clk_reg) & ~rec->a_clk_mask;
61 	WREG32(rec->a_clk_reg, temp);
63 	temp = RREG32(rec->a_data_reg) & ~rec->a_data_mask;
64 	WREG32(rec->a_data_reg, temp);
67 	temp = RREG32(rec->en_clk_reg) & ~rec->en_clk_mask;
68 	WREG32(rec->en_clk_reg, temp);
70 	temp = RREG32(rec->en_data_reg) & ~rec->en_data_mask;
71 	WREG32(rec->en_data_reg, temp);
74 	temp = RREG32(rec->mask_clk_reg) | rec->mask_clk_mask;
75 	WREG32(rec->mask_clk_reg, temp);
76 	temp = RREG32(rec->mask_clk_reg);
78 	temp = RREG32(rec->mask_data_reg) | rec->mask_data_mask;
79 	WREG32(rec->mask_data_reg, temp);
80 	temp = RREG32(rec->mask_data_reg);
89 	struct amdgpu_i2c_bus_rec *rec = &i2c->rec;
93 	temp = RREG32(rec->mask_clk_reg) & ~rec->mask_clk_mask;
94 	WREG32(rec->mask_clk_reg, temp);
95 	temp = RREG32(rec->mask_clk_reg);
97 	temp = RREG32(rec->mask_data_reg) & ~rec->mask_data_mask;
98 	WREG32(rec->mask_data_reg, temp);
99 	temp = RREG32(rec->mask_data_reg);
108 	struct amdgpu_i2c_bus_rec *rec = &i2c->rec;
112 	val = RREG32(rec->y_clk_reg);
113 	val &= rec->y_clk_mask;
123 	struct amdgpu_i2c_bus_rec *rec = &i2c->rec;
127 	val = RREG32(rec->y_data_reg);
128 	val &= rec->y_data_mask;
137 	struct amdgpu_i2c_bus_rec *rec = &i2c->rec;
141 	val = RREG32(rec->en_clk_reg) & ~rec->en_clk_mask;
142 	val |= clock ? 0 : rec->en_clk_mask;
143 	WREG32(rec->en_clk_reg, val);
150 	struct amdgpu_i2c_bus_rec *rec = &i2c->rec;
154 	val = RREG32(rec->en_data_reg) & ~rec->en_data_mask;
155 	val |= data ? 0 : rec->en_data_mask;
156 	WREG32(rec->en_data_reg, val);
257 					  const struct amdgpu_i2c_bus_rec *rec,
264 	if (rec->mm_i2c && (amdgpu_hw_i2c == 0))
271 	i2c->rec = *rec;
280 	if (rec->hw_capable &&
361 		    const struct amdgpu_i2c_bus_rec *rec,
369 			adev->i2c_bus[i] = amdgpu_i2c_create(dev, rec, name);
384 		    (adev->i2c_bus[i]->rec.i2c_id == i2c_bus->i2c_id)) {