amd/amdgpu/amdgpu_atombios_encoders.c

1724 	uint32_t bios_0_scratch;
1731 	bios_0_scratch = RREG32(mmBIOS_SCRATCH_0);
1733 	DRM_DEBUG_KMS("Bios 0 scratch %x %08x\n", bios_0_scratch, amdgpu_encoder->devices);
1735 		if (bios_0_scratch & ATOM_S0_CRT1_MASK)
1739 		if (bios_0_scratch & ATOM_S0_CRT2_MASK)
1743 		if (bios_0_scratch & (ATOM_S0_CV_MASK|ATOM_S0_CV_MASK_A))
1747 		if (bios_0_scratch & (ATOM_S0_TV1_COMPOSITE | ATOM_S0_TV1_COMPOSITE_A))
1749 		else if (bios_0_scratch & (ATOM_S0_TV1_SVIDEO | ATOM_S0_TV1_SVIDEO_A))
1764 	u32 bios_0_scratch;
1776 	bios_0_scratch = RREG32(mmBIOS_SCRATCH_0);
1778 	DRM_DEBUG_KMS("Bios 0 scratch %x %08x\n", bios_0_scratch, amdgpu_encoder->devices);
1780 		if (bios_0_scratch & ATOM_S0_CRT1_MASK)
1784 		if (bios_0_scratch & ATOM_S0_CRT2_MASK)
1788 		if (bios_0_scratch & (ATOM_S0_CV_MASK|ATOM_S0_CV_MASK_A))
1792 		if (bios_0_scratch & (ATOM_S0_TV1_COMPOSITE | ATOM_S0_TV1_COMPOSITE_A))
1794 		else if (bios_0_scratch & (ATOM_S0_TV1_SVIDEO | ATOM_S0_TV1_SVIDEO_A))
1822 	uint32_t bios_0_scratch, bios_3_scratch, bios_6_scratch;
1824 	bios_0_scratch = RREG32(mmBIOS_SCRATCH_0);
1832 			bios_0_scratch |= ATOM_S0_LCD1;
1837 			bios_0_scratch &= ~ATOM_S0_LCD1;
1846 			bios_0_scratch |= ATOM_S0_CRT1_COLOR;
1851 			bios_0_scratch &= ~ATOM_S0_CRT1_MASK;
1860 			bios_0_scratch |= ATOM_S0_CRT2_COLOR;
1865 			bios_0_scratch &= ~ATOM_S0_CRT2_MASK;
1874 			bios_0_scratch |= ATOM_S0_DFP1;
1879 			bios_0_scratch &= ~ATOM_S0_DFP1;
1888 			bios_0_scratch |= ATOM_S0_DFP2;
1893 			bios_0_scratch &= ~ATOM_S0_DFP2;
1902 			bios_0_scratch |= ATOM_S0_DFP3;
1907 			bios_0_scratch &= ~ATOM_S0_DFP3;
1916 			bios_0_scratch |= ATOM_S0_DFP4;
1921 			bios_0_scratch &= ~ATOM_S0_DFP4;
1930 			bios_0_scratch |= ATOM_S0_DFP5;
1935 			bios_0_scratch &= ~ATOM_S0_DFP5;
1944 			bios_0_scratch |= ATOM_S0_DFP6;
1949 			bios_0_scratch &= ~ATOM_S0_DFP6;
1955 	WREG32(mmBIOS_SCRATCH_0, bios_0_scratch);