amd/amdgpu/amdgpu_amdkfd_gfx_v9.h

23 void kgd_gfx_v9_program_sh_mem_settings(struct amdgpu_device *adev, uint32_t vmid,
24 		uint32_t sh_mem_config,
25 		uint32_t sh_mem_ape1_base, uint32_t sh_mem_ape1_limit,
26 		uint32_t sh_mem_bases, uint32_t inst);
28 		unsigned int vmid, uint32_t inst);
29 int kgd_gfx_v9_init_interrupts(struct amdgpu_device *adev, uint32_t pipe_id,
30 				uint32_t inst);
31 int kgd_gfx_v9_hqd_load(struct amdgpu_device *adev, void *mqd, uint32_t pipe_id,
32 			uint32_t queue_id, uint32_t __user *wptr,
33 			uint32_t wptr_shift, uint32_t wptr_mask,
34 			struct mm_struct *mm, uint32_t inst);
36 			    uint32_t pipe_id, uint32_t queue_id,
37 			    uint32_t doorbell_off, uint32_t inst);
39 			uint32_t pipe_id, uint32_t queue_id,
40 			uint32_t (**dump)[2], uint32_t *n_regs, uint32_t inst);
42 			uint64_t queue_address, uint32_t pipe_id,
43 			uint32_t queue_id, uint32_t inst);
46 				unsigned int utimeout, uint32_t pipe_id,
47 				uint32_t queue_id, uint32_t inst);
49 					uint32_t gfx_index_val,
50 					uint32_t sq_cmd, uint32_t inst);
54 			uint32_t vmid, uint64_t page_table_base);
56 		int *pasid_wave_cnt, int *max_waves_per_cu, uint32_t inst);
58 		uint32_t vmid, uint64_t tba_addr, uint64_t tma_addr,
59 		uint32_t inst);
60 void kgd_gfx_v9_acquire_queue(struct amdgpu_device *adev, uint32_t pipe_id,
61 				uint32_t queue_id, uint32_t inst);
63 				uint32_t pipe_id, uint32_t queue_id);
64 void kgd_gfx_v9_release_queue(struct amdgpu_device *adev, uint32_t inst);
66 					uint32_t vmid,
68 uint32_t kgd_gfx_v9_enable_debug_trap(struct amdgpu_device *adev,
70 				      uint32_t vmid);
71 uint32_t kgd_gfx_v9_disable_debug_trap(struct amdgpu_device *adev,
73 					uint32_t vmid);
75 					     uint32_t trap_override,
76 					     uint32_t *trap_mask_supported);
77 uint32_t kgd_gfx_v9_set_wave_launch_mode(struct amdgpu_device *adev,
79 					uint32_t vmid);
80 uint32_t kgd_gfx_v9_set_wave_launch_trap_override(struct amdgpu_device *adev,
81 					     uint32_t vmid,
82 					     uint32_t trap_override,
83 					     uint32_t trap_mask_bits,
84 					     uint32_t trap_mask_request,
85 					     uint32_t *trap_mask_prev,
86 					     uint32_t kfd_dbg_trap_cntl_prev);
87 uint32_t kgd_gfx_v9_set_address_watch(struct amdgpu_device *adev,
89 					uint32_t watch_address_mask,
90 					uint32_t watch_id,
91 					uint32_t watch_mode,
92 					uint32_t debug_vmid,
93 					uint32_t inst);
94 uint32_t kgd_gfx_v9_clear_address_watch(struct amdgpu_device *adev,
95 					uint32_t watch_id);
97 				uint32_t *wait_times,
98 				uint32_t inst);
100 					       uint32_t wait_times,
101 					       uint32_t grace_period,
102 					       uint32_t *reg_offset,
103 					       uint32_t *reg_data);