Lines Matching defs:sc
32 #define HREAD2(sc, reg) \
33 (bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (reg)))
34 #define HWRITE2(sc, reg, val) \
35 bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
36 #define HREAD4(sc, reg) \
37 (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
38 #define HWRITE4(sc, reg, val) \
39 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
76 struct pinctrl_softc *sc = (struct pinctrl_softc *)self;
84 sc->sc_reg_width = OF_getpropint(faa->fa_node,
86 if (sc->sc_reg_width != 16 &&
87 sc->sc_reg_width != 32) {
92 sc->sc_ncells = OF_getpropint(faa->fa_node, "#pinctrl-cells", 1);
93 sc->sc_func_mask = OF_getpropint(faa->fa_node,
96 sc->sc_iot = faa->fa_iot;
97 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
98 faa->fa_reg[0].size, 0, &sc->sc_ioh)) {
103 pinctrl_register(faa->fa_node, pinctrl_pinctrl, sc);
139 struct pinctrl_softc *sc = cookie;
154 for (i = 0; i < len / sizeof(uint32_t); i += (1 + sc->sc_ncells)) {
159 if (sc->sc_ncells == 2)
162 if (sc->sc_reg_width == 16)
163 val = HREAD2(sc, reg);
164 else if (sc->sc_reg_width == 32)
165 val = HREAD4(sc, reg);
167 val &= ~sc->sc_func_mask;
168 val |= (func & sc->sc_func_mask);
174 if (sc->sc_reg_width == 16)
175 HWRITE2(sc, reg, val);
176 else if (sc->sc_reg_width == 32)
177 HWRITE4(sc, reg, val);